
//vpss_hal_ip_sys.h begin

#ifndef __VPSS_HAL_IP_SYS_H__
#define __VPSS_HAL_IP_SYS_H__

#include "hi_reg_common.h"
#include "vpss_define.h"

HI_U32 VPSS_HAL_GetGetRawIntStatus(S_VPSS_REGS_TYPE *pstVpssRegs);
HI_U32 VPSS_HAL_GetGetIntStatus(S_VPSS_REGS_TYPE *pstVpssRegs);
HI_S32 VPSS_DRV_Get_SMMU_INTSTAT_S(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 *pu32SecureState, HI_U32 *pu32NoSecureState);

HI_VOID VPSS_Sys_SetIntMask(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 u32Mask);
HI_U32 VPSS_Sys_GetIntState(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset);
HI_VOID VPSS_Sys_SetIntClr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 u32Data1);
HI_U32 VPSS_DRV_GetEofCnt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset);
HI_U32 VPSS_Sys_GetPfcnt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset);

HI_VOID VPSS_Sys_SetBfieldFirst(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bfield_first);
HI_VOID VPSS_Sys_SetIgbmEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 igbm_en);
HI_VOID VPSS_Sys_SetIfmdEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ifmd_en);
HI_VOID VPSS_Sys_SetHdrIn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hdr_in);
HI_VOID VPSS_Sys_SetFourPixEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 four_pix_en);
HI_VOID VPSS_Sys_SetTnrEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 tnr_en);
HI_VOID VPSS_Sys_SetSnrEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 snr_en);
HI_VOID VPSS_Sys_SetBlkDetEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 blk_det_en);
HI_VOID VPSS_Sys_SetBit10BypassEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bit10_bypass_en);
HI_VOID VPSS_Sys_SetRgmeEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rgme_en);
HI_VOID VPSS_Sys_SetVc1En(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vc1_en);
HI_VOID VPSS_Sys_SetMcdiEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mcdi_en);
HI_VOID VPSS_Sys_SetDeiEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dei_en);
HI_VOID VPSS_Sys_SetOutProEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 out_pro_en);
HI_VOID VPSS_Sys_SetMadVfirEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mad_vfir_en);
HI_VOID VPSS_Sys_SetVhd0En(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_en);
HI_VOID VPSS_Sys_SetMcnrEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mcnr_en);
HI_VOID VPSS_Sys_SetTnrMadMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 tnr_mad_mode);

HI_VOID VPSS_Sys_SetVhd0LbaEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_lba_en);
HI_VOID VPSS_Sys_SetVhd0CropEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_crop_en);
HI_VOID VPSS_Sys_SetVhd0PreVfirEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_pre_vfir_en);
HI_VOID VPSS_Sys_SetZmeVhd0En(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 zme_vhd0_en);
HI_VOID VPSS_Sys_SetCmdCntRdChn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cmd_cnt_rd_chn);
HI_VOID VPSS_Sys_SetCmdlenCntRdChn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cmdlen_cnt_rd_chn);
HI_VOID VPSS_Sys_SetCmdCntWrChn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cmd_cnt_wr_chn);
HI_VOID VPSS_Sys_SetCmdlenCntWrChn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cmdlen_cnt_wr_chn);
HI_VOID VPSS_Sys_SetRchTransrBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_transr_bypass);
HI_VOID VPSS_Sys_SetRchNx2cTile2bitBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_nx2c_tile_2bit_bypass);
HI_VOID VPSS_Sys_SetRchNx2yTile2bitBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_nx2y_tile_2bit_bypass);
HI_VOID VPSS_Sys_SetRchNx2cHeadBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_nx2c_head_bypass);
HI_VOID VPSS_Sys_SetRchNx2yHeadBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_nx2y_head_bypass);
HI_VOID VPSS_Sys_SetRchTunlBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_tunl_bypass);
HI_VOID VPSS_Sys_SetRchReecBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_reec_bypass);
HI_VOID VPSS_Sys_SetRchReeyBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_reey_bypass);
HI_VOID VPSS_Sys_SetRchRgmvCurBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_rgmv_cur_bypass);
HI_VOID VPSS_Sys_SetRchRgmvNx1Bypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_rgmv_nx1_bypass);
HI_VOID VPSS_Sys_SetRchPrjvCurBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_prjv_cur_bypass);
HI_VOID VPSS_Sys_SetRchBlkmvRefBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_blkmv_ref_bypass);
HI_VOID VPSS_Sys_SetRchBlkmvCurBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_blkmv_cur_bypass);
HI_VOID VPSS_Sys_SetRchBlkmvNx1Bypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_blkmv_nx1_bypass);
HI_VOID VPSS_Sys_SetRchPrjhCurBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_prjh_cur_bypass);
HI_VOID VPSS_Sys_SetRchRstBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_rst_bypass);
HI_VOID VPSS_Sys_SetRchSrmdBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_srmd_bypass);
HI_VOID VPSS_Sys_SetRchTrmdBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_trmd_bypass);
HI_VOID VPSS_Sys_SetRchNx2cBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_nx2c_bypass);
HI_VOID VPSS_Sys_SetRchNx2yBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_nx2y_bypass);
HI_VOID VPSS_Sys_SetRchNx1cBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_nx1c_bypass);
HI_VOID VPSS_Sys_SetRchNx1yBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_nx1y_bypass);
HI_VOID VPSS_Sys_SetRchRefcBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_refc_bypass);
HI_VOID VPSS_Sys_SetRchRefyBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_refy_bypass);
HI_VOID VPSS_Sys_SetRchCurcBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_curc_bypass);
HI_VOID VPSS_Sys_SetRchCuryBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rch_cury_bypass);
HI_VOID VPSS_Sys_SetWchTunlBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_tunl_bypass);
HI_VOID VPSS_Sys_SetWchTranswBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_transw_bypass);
HI_VOID VPSS_Sys_SetWchCuecBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_cuec_bypass);
HI_VOID VPSS_Sys_SetWchCueyBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_cuey_bypass);
HI_VOID VPSS_Sys_SetWchRgmvnx2Bypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_rgmvnx2_bypass);
HI_VOID VPSS_Sys_SetWchPrjvnx2Bypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_prjvnx2_bypass);
HI_VOID VPSS_Sys_SetWchBlkmvnx2Bypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_blkmvnx2_bypass);
HI_VOID VPSS_Sys_SetWchPrjhnx2Bypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_prjhnx2_bypass);
HI_VOID VPSS_Sys_SetWchSttBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_stt_bypass);
HI_VOID VPSS_Sys_SetWchTwmdBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_twmd_bypass);
HI_VOID VPSS_Sys_SetWchWstBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_wst_bypass);
HI_VOID VPSS_Sys_SetWchRfrcBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_rfrc_bypass);
HI_VOID VPSS_Sys_SetWchRfryBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_rfry_bypass);
HI_VOID VPSS_Sys_SetWchVhd0cBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_vhd0c_bypass);
HI_VOID VPSS_Sys_SetWchVhd0yBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 wch_vhd0y_bypass);
HI_VOID VPSS_Sys_SetVhd0ZmeOh(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_zme_oh);
HI_VOID VPSS_Sys_SetVhd0ZmeOw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_zme_ow);
HI_VOID VPSS_Sys_SetVhd0SclLh(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_scl_lh);
HI_VOID VPSS_Sys_SetVhd0SclLv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_scl_lv);
HI_VOID VPSS_Sys_SetVhd0SclCh(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_scl_ch);
HI_VOID VPSS_Sys_SetVhd0SclCv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_scl_cv);
HI_VOID VPSS_Sys_SetTnrCfgAddr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 tnr_cfg_addr);
HI_VOID VPSS_Sys_SetSnrCfgAddr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 snr_cfg_addr);
HI_VOID VPSS_Sys_SetZmeCfgAddr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 zme_cfg_addr);
HI_VOID VPSS_Sys_SetDeiCfgAddr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dei_cfg_addr);
HI_VOID VPSS_Sys_SetHdrCfgAddr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hdr_cfg_addr);
HI_VOID VPSS_Sys_SetNodeid(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nodeid);
HI_VOID VPSS_Sys_SetPNext(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 p_next);
HI_VOID VPSS_Sys_SetStart(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 start);
HI_VOID VPSS_Sys_SetBusRErrState(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bus_r_err_state);
HI_VOID VPSS_Sys_SetDcmpErrState(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dcmp_err_state);
HI_VOID VPSS_Sys_SetVhd0TunlState(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_tunl_state);
HI_VOID VPSS_Sys_SetEofEndState(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 eof_end_state);
HI_VOID VPSS_Sys_SetBusWErrState(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bus_w_err_state);
HI_VOID VPSS_Sys_SetTimeoutState(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 timeout_state);
HI_VOID VPSS_Sys_SetEofState(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 eof_state);
HI_VOID VPSS_Sys_SetBusRErrClr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bus_r_err_clr);
HI_VOID VPSS_Sys_SetDcmpErrClr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dcmp_err_clr);
HI_VOID VPSS_Sys_SetVhd0TunlClr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_tunl_clr);
HI_VOID VPSS_Sys_SetEofEndClr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 eof_end_clr);
HI_VOID VPSS_Sys_SetBusWErrClr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bus_w_err_clr);
HI_VOID VPSS_Sys_SetTimeoutClr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 timeout_clr);
HI_VOID VPSS_Sys_SetEofClr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 eof_clr);
HI_VOID VPSS_Sys_SetRawBusRErr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 raw_bus_r_err);
HI_VOID VPSS_Sys_SetRawDcmpErr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 raw_dcmp_err);
HI_VOID VPSS_Sys_SetRawVhd0Tunl(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 raw_vhd0_tunl);
HI_VOID VPSS_Sys_SetRawEofEnd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 raw_eof_end);
HI_VOID VPSS_Sys_SetRawBusWErr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 raw_bus_w_err);
HI_VOID VPSS_Sys_SetRawTimeout(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 raw_timeout);
HI_VOID VPSS_Sys_SetRawEof(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 raw_eof);
HI_VOID VPSS_Sys_SetPfcnt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 pfcnt);
HI_VOID VPSS_Sys_SetBurstLenCfg(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 burst_len_cfg);
HI_VOID VPSS_Sys_SetCkGtEnCalc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ck_gt_en_calc);
HI_VOID VPSS_Sys_SetCkGtEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ck_gt_en);
HI_VOID VPSS_Sys_SetHardCkGtEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hard_gate_clk_ppc_en, HI_U32 hard_gate_clk_axi_en);
HI_VOID VPSS_Sys_SetInitTimer(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 init_timer);
HI_VOID VPSS_Sys_SetWoutstanding(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 woutstanding);
HI_VOID VPSS_Sys_SetRoutstanding(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 routstanding);
HI_VOID VPSS_Sys_SetMacChPrio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mac_ch_prio);
HI_VOID VPSS_Sys_SetTimeout(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 timeout);
HI_VOID VPSS_Sys_SetNodeRstEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 node_rst_en);
HI_VOID VPSS_Sys_SetBusRErrMask(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bus_r_err_mask);
HI_VOID VPSS_Sys_SetDcmpErrMask(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dcmp_err_mask);
HI_VOID VPSS_Sys_SetVhd0TunlMask(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_tunl_mask);
HI_VOID VPSS_Sys_SetEofEndMask(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 eof_end_mask);
HI_VOID VPSS_Sys_SetBusWErrMask(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bus_w_err_mask);
HI_VOID VPSS_Sys_SetTimeoutMask(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 timeout_mask);
HI_VOID VPSS_Sys_SetEofMask(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 eof_mask);
HI_VOID VPSS_Sys_SetEofCnt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 eof_cnt);
HI_VOID VPSS_Sys_SetVersion(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 version);
HI_VOID VPSS_Sys_SetB128SplitEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 b128_split_en);
HI_VOID VPSS_Sys_SetB256SplitEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 b256_split_en);
HI_VOID VPSS_Sys_SetVhd0PreVfirMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_pre_vfir_mode);
HI_VOID VPSS_Sys_SetRotateAngle(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rotate_angle);
HI_VOID VPSS_Sys_SetVhd0CropHeight(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_crop_height);
HI_VOID VPSS_Sys_SetVhd0CropWidth(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_crop_width);
HI_VOID VPSS_Sys_SetVhd0CropY(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_crop_y);
HI_VOID VPSS_Sys_SetVhd0CropX(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_crop_x);
HI_VOID VPSS_Sys_SetVhd0LbaHeight(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_lba_height);
HI_VOID VPSS_Sys_SetVhd0LbaWidth(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_lba_width);
HI_VOID VPSS_Sys_SetVhd0LbaYfpos(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_lba_yfpos);
HI_VOID VPSS_Sys_SetVhd0LbaXfpos(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_lba_xfpos);
HI_VOID VPSS_Sys_SetVhd0VbkCr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_vbk_cr);
HI_VOID VPSS_Sys_SetVhd0VbkCb(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_vbk_cb);
HI_VOID VPSS_Sys_SetVhd0VbkY(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vhd0_vbk_y);
HI_VOID VPSS_Sys_SetRefVc1Rangedfrm(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ref_vc1_rangedfrm);
HI_VOID VPSS_Sys_SetRefVc1Profile(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ref_vc1_profile);
HI_VOID VPSS_Sys_SetRefVc1Mapyflg(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ref_vc1_mapyflg);
HI_VOID VPSS_Sys_SetRefVc1Mapcflg(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ref_vc1_mapcflg);
HI_VOID VPSS_Sys_SetRefVc1Mapy(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ref_vc1_mapy);
HI_VOID VPSS_Sys_SetRefVc1Mapc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ref_vc1_mapc);
HI_VOID VPSS_Sys_SetCurVc1Rangedfrm(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cur_vc1_rangedfrm);
HI_VOID VPSS_Sys_SetCurVc1Profile(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cur_vc1_profile);
HI_VOID VPSS_Sys_SetCurVc1Mapyflg(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cur_vc1_mapyflg);
HI_VOID VPSS_Sys_SetCurVc1Mapcflg(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cur_vc1_mapcflg);
HI_VOID VPSS_Sys_SetCurVc1Mapy(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cur_vc1_mapy);
HI_VOID VPSS_Sys_SetCurVc1Mapc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cur_vc1_mapc);
HI_VOID VPSS_Sys_SetNx1Vc1Rangedfrm(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nx1_vc1_rangedfrm);
HI_VOID VPSS_Sys_SetNx1Vc1Profile(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nx1_vc1_profile);
HI_VOID VPSS_Sys_SetNx1Vc1Mapyflg(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nx1_vc1_mapyflg);
HI_VOID VPSS_Sys_SetNx1Vc1Mapcflg(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nx1_vc1_mapcflg);
HI_VOID VPSS_Sys_SetNx1Vc1Mapy(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nx1_vc1_mapy);
HI_VOID VPSS_Sys_SetNx1Vc1Mapc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nx1_vc1_mapc);
HI_VOID VPSS_Sys_SetNx2Vc1Rangedfrm(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nx2_vc1_rangedfrm);
HI_VOID VPSS_Sys_SetNx2Vc1Profile(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nx2_vc1_profile);
HI_VOID VPSS_Sys_SetNx2Vc1Mapyflg(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nx2_vc1_mapyflg);
HI_VOID VPSS_Sys_SetNx2Vc1Mapcflg(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nx2_vc1_mapcflg);
HI_VOID VPSS_Sys_SetNx2Vc1Mapy(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nx2_vc1_mapy);
HI_VOID VPSS_Sys_SetNx2Vc1Mapc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nx2_vc1_mapc);
HI_VOID VPSS_Sys_SetDieOutSelL(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 die_out_sel_l);
HI_VOID VPSS_Sys_SetDieOutSelC(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 die_out_sel_c);
HI_VOID VPSS_Sys_SetDieLMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 die_l_mode);
HI_VOID VPSS_Sys_SetDieCMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 die_c_mode);
HI_VOID VPSS_Sys_SetTwoFourPxlShare(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 two_four_pxl_share);
HI_VOID VPSS_Sys_SetMcOnly(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mc_only);
HI_VOID VPSS_Sys_SetMaOnly(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ma_only);
HI_VOID VPSS_Sys_SetEdgeSmoothEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_smooth_en);
HI_VOID VPSS_Sys_SetMchdirL(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mchdir_l);
HI_VOID VPSS_Sys_SetMchdirC(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mchdir_c);
HI_VOID VPSS_Sys_SetDieRst(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 die_rst);
HI_VOID VPSS_Sys_SetStinfoStop(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 stinfo_stop);
HI_VOID VPSS_Sys_SetEdgeSmoothRatio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_smooth_ratio);
HI_VOID VPSS_Sys_SetChromaMfOffset(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 chroma_mf_offset);
HI_VOID VPSS_Sys_SetDeiStRstValue(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dei_st_rst_value);
HI_VOID VPSS_Sys_SetRecModeEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rec_mode_en);
HI_VOID VPSS_Sys_SetChromaMfMax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 chroma_mf_max);
HI_VOID VPSS_Sys_SetLumaMfMax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 luma_mf_max);
HI_VOID VPSS_Sys_SetMotionIirEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_iir_en);
HI_VOID VPSS_Sys_SetLumaScesdfMax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 luma_scesdf_max);
HI_VOID VPSS_Sys_SetFrameMotionSmoothEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_en);
HI_VOID VPSS_Sys_SetRecmodeFrmfldBlendMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 recmode_frmfld_blend_mode);
HI_VOID VPSS_Sys_SetMinNorthStrength(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 min_north_strength);
HI_VOID VPSS_Sys_SetDirRatioNorth(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir_ratio_north);
HI_VOID VPSS_Sys_SetRecModeOutputMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rec_mode_output_mode);
HI_VOID VPSS_Sys_SetRecModeSetPreInfoMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rec_mode_set_pre_info_mode);
HI_VOID VPSS_Sys_SetRangeScale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 range_scale);
HI_VOID VPSS_Sys_SetBc1Gain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bc1_gain);
HI_VOID VPSS_Sys_SetBc1AutodzGain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bc1_autodz_gain);
HI_VOID VPSS_Sys_SetBc1MaxDz(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bc1_max_dz);
HI_VOID VPSS_Sys_SetBc2Gain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bc2_gain);
HI_VOID VPSS_Sys_SetBc2AutodzGain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bc2_autodz_gain);
HI_VOID VPSS_Sys_SetBc2MaxDz(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bc2_max_dz);
HI_VOID VPSS_Sys_SetDir3Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir3_scale);
HI_VOID VPSS_Sys_SetDir2Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir2_scale);
HI_VOID VPSS_Sys_SetDir1Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir1_scale);
HI_VOID VPSS_Sys_SetDir0Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir0_scale);
HI_VOID VPSS_Sys_SetDir7Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir7_scale);
HI_VOID VPSS_Sys_SetDir6Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir6_scale);
HI_VOID VPSS_Sys_SetDir5Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir5_scale);
HI_VOID VPSS_Sys_SetDir4Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir4_scale);
HI_VOID VPSS_Sys_SetDir11Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir11_scale);
HI_VOID VPSS_Sys_SetDir10Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir10_scale);
HI_VOID VPSS_Sys_SetDir9Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir9_scale);
HI_VOID VPSS_Sys_SetDir8Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir8_scale);
HI_VOID VPSS_Sys_SetDir14Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir14_scale);
HI_VOID VPSS_Sys_SetDir13Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir13_scale);
HI_VOID VPSS_Sys_SetDir12Scale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir12_scale);
HI_VOID VPSS_Sys_SetCHeightCnt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 c_height_cnt);
HI_VOID VPSS_Sys_SetLHeightCnt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 l_height_cnt);
HI_VOID VPSS_Sys_SetCurCstate(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cur_cstate);
HI_VOID VPSS_Sys_SetCurState(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cur_state);
HI_VOID VPSS_Sys_SetIntpScaleRatio8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_8);
HI_VOID VPSS_Sys_SetIntpScaleRatio7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_7);
HI_VOID VPSS_Sys_SetIntpScaleRatio6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_6);
HI_VOID VPSS_Sys_SetIntpScaleRatio5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_5);
HI_VOID VPSS_Sys_SetIntpScaleRatio4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_4);
HI_VOID VPSS_Sys_SetIntpScaleRatio3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_3);
HI_VOID VPSS_Sys_SetIntpScaleRatio2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_2);
HI_VOID VPSS_Sys_SetIntpScaleRatio1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_1);
HI_VOID VPSS_Sys_SetIntpScaleRatio15(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_15);
HI_VOID VPSS_Sys_SetIntpScaleRatio14(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_14);
HI_VOID VPSS_Sys_SetIntpScaleRatio13(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_13);
HI_VOID VPSS_Sys_SetIntpScaleRatio12(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_12);
HI_VOID VPSS_Sys_SetIntpScaleRatio11(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_11);
HI_VOID VPSS_Sys_SetIntpScaleRatio10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_10);
HI_VOID VPSS_Sys_SetIntpScaleRatio9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 intp_scale_ratio_9);
HI_VOID VPSS_Sys_SetStrengthThd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 strength_thd);
HI_VOID VPSS_Sys_SetHorEdgeEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hor_edge_en);
HI_VOID VPSS_Sys_SetEdgeMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_mode);
HI_VOID VPSS_Sys_SetDirThd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir_thd);
HI_VOID VPSS_Sys_SetBcGain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bc_gain);
HI_VOID VPSS_Sys_SetFldMotionCoring(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 fld_motion_coring);
HI_VOID VPSS_Sys_SetJitterCoring(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 jitter_coring);
HI_VOID VPSS_Sys_SetJitterGain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 jitter_gain);
HI_VOID VPSS_Sys_SetLongMotionShf(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 long_motion_shf);
HI_VOID VPSS_Sys_SetFldMotionWndMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 fld_motion_wnd_mode);
HI_VOID VPSS_Sys_SetFldMotionGain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 fld_motion_gain);
HI_VOID VPSS_Sys_SetFldMotionCurveSlope(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 fld_motion_curve_slope);
HI_VOID VPSS_Sys_SetFldMotionThdHigh(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 fld_motion_thd_high);
HI_VOID VPSS_Sys_SetFldMotionThdLow(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 fld_motion_thd_low);
HI_VOID VPSS_Sys_SetMotionDiffThd3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_diff_thd_3);
HI_VOID VPSS_Sys_SetMotionDiffThd2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_diff_thd_2);
HI_VOID VPSS_Sys_SetMotionDiffThd1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_diff_thd_1);
HI_VOID VPSS_Sys_SetMotionDiffThd0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_diff_thd_0);
HI_VOID VPSS_Sys_SetMaxMotionIirRatio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 max_motion_iir_ratio);
HI_VOID VPSS_Sys_SetMinMotionIirRatio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 min_motion_iir_ratio);
HI_VOID VPSS_Sys_SetMotionDiffThd5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_diff_thd_5);
HI_VOID VPSS_Sys_SetMotionDiffThd4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_diff_thd_4);
HI_VOID VPSS_Sys_SetMotionIirCurveRatio0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_iir_curve_ratio_0);
HI_VOID VPSS_Sys_SetMotionIirCurveSlope3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_iir_curve_slope_3);
HI_VOID VPSS_Sys_SetMotionIirCurveSlope2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_iir_curve_slope_2);
HI_VOID VPSS_Sys_SetMotionIirCurveSlope1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_iir_curve_slope_1);
HI_VOID VPSS_Sys_SetMotionIirCurveSlope0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_iir_curve_slope_0);
HI_VOID VPSS_Sys_SetMotionIirCurveRatio4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_iir_curve_ratio_4);
HI_VOID VPSS_Sys_SetMotionIirCurveRatio3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_iir_curve_ratio_3);
HI_VOID VPSS_Sys_SetMotionIirCurveRatio2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_iir_curve_ratio_2);
HI_VOID VPSS_Sys_SetMotionIirCurveRatio1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_iir_curve_ratio_1);
HI_VOID VPSS_Sys_SetHisMotionInfoWriteMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 his_motion_info_write_mode);
HI_VOID VPSS_Sys_SetHisMotionWriteMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 his_motion_write_mode);
HI_VOID VPSS_Sys_SetHisMotionUsingMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 his_motion_using_mode);
HI_VOID VPSS_Sys_SetHisMotionEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 his_motion_en);
HI_VOID VPSS_Sys_SetPreInfoEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 pre_info_en);
HI_VOID VPSS_Sys_SetPpreInfoEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ppre_info_en);
HI_VOID VPSS_Sys_SetRecModeFrmMotionStep1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rec_mode_frm_motion_step_1);
HI_VOID VPSS_Sys_SetRecModeFrmMotionStep0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rec_mode_frm_motion_step_0);
HI_VOID VPSS_Sys_SetRecModeFldMotionStep1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rec_mode_fld_motion_step_1);
HI_VOID VPSS_Sys_SetRecModeFldMotionStep0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rec_mode_fld_motion_step_0);
HI_VOID VPSS_Sys_SetMedBlendEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 med_blend_en);
HI_VOID VPSS_Sys_SetMorFltEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mor_flt_en);
HI_VOID VPSS_Sys_SetMorFltSize(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mor_flt_size);
HI_VOID VPSS_Sys_SetMorFltThd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mor_flt_thd);
HI_VOID VPSS_Sys_SetCombChkUpperLimit(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 comb_chk_upper_limit);
HI_VOID VPSS_Sys_SetCombChkLowerLimit(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 comb_chk_lower_limit);
HI_VOID VPSS_Sys_SetCombChkMinVthd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 comb_chk_min_vthd);
HI_VOID VPSS_Sys_SetCombChkMinHthd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 comb_chk_min_hthd);
HI_VOID VPSS_Sys_SetCombChkEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 comb_chk_en);
HI_VOID VPSS_Sys_SetCombChkMdThd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 comb_chk_md_thd);
HI_VOID VPSS_Sys_SetCombChkEdgeThd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 comb_chk_edge_thd);
HI_VOID VPSS_Sys_SetFrameMotionSmoothThd3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_thd3);
HI_VOID VPSS_Sys_SetFrameMotionSmoothThd2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_thd2);
HI_VOID VPSS_Sys_SetFrameMotionSmoothThd1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_thd1);
HI_VOID VPSS_Sys_SetFrameMotionSmoothThd0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_thd0);
HI_VOID VPSS_Sys_SetFrameMotionSmoothRatioMax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_ratio_max);
HI_VOID VPSS_Sys_SetFrameMotionSmoothRatioMin(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_ratio_min);
HI_VOID VPSS_Sys_SetFrameMotionSmoothThd5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_thd5);
HI_VOID VPSS_Sys_SetFrameMotionSmoothThd4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_thd4);
HI_VOID VPSS_Sys_SetFrameMotionSmoothRatio0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_ratio0);
HI_VOID VPSS_Sys_SetFrameMotionSmoothSlope3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_slope3);
HI_VOID VPSS_Sys_SetFrameMotionSmoothSlope2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_slope2);
HI_VOID VPSS_Sys_SetFrameMotionSmoothSlope1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_slope1);
HI_VOID VPSS_Sys_SetFrameMotionSmoothSlope0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_slope0);
HI_VOID VPSS_Sys_SetFrameMotionSmoothRatio4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_ratio4);
HI_VOID VPSS_Sys_SetFrameMotionSmoothRatio3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_ratio3);
HI_VOID VPSS_Sys_SetFrameMotionSmoothRatio2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_ratio2);
HI_VOID VPSS_Sys_SetFrameMotionSmoothRatio1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_motion_smooth_ratio1);
HI_VOID VPSS_Sys_SetFrameFieldBlendThd3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_thd3);
HI_VOID VPSS_Sys_SetFrameFieldBlendThd2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_thd2);
HI_VOID VPSS_Sys_SetFrameFieldBlendThd1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_thd1);
HI_VOID VPSS_Sys_SetFrameFieldBlendThd0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_thd0);
HI_VOID VPSS_Sys_SetFrameFieldBlendRatioMax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_ratio_max);
HI_VOID VPSS_Sys_SetFrameFieldBlendRatioMin(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_ratio_min);
HI_VOID VPSS_Sys_SetFrameFieldBlendThd5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_thd5);
HI_VOID VPSS_Sys_SetFrameFieldBlendThd4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_thd4);
HI_VOID VPSS_Sys_SetFrameFieldBlendRatio0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_ratio0);
HI_VOID VPSS_Sys_SetFrameFieldBlendSlope3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_slope3);
HI_VOID VPSS_Sys_SetFrameFieldBlendSlope2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_slope2);
HI_VOID VPSS_Sys_SetFrameFieldBlendSlope1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_slope1);
HI_VOID VPSS_Sys_SetFrameFieldBlendSlope0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_slope0);
HI_VOID VPSS_Sys_SetFrameFieldBlendRatio4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_ratio4);
HI_VOID VPSS_Sys_SetFrameFieldBlendRatio3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_ratio3);
HI_VOID VPSS_Sys_SetFrameFieldBlendRatio2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_ratio2);
HI_VOID VPSS_Sys_SetFrameFieldBlendRatio1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_field_blend_ratio1);
HI_VOID VPSS_Sys_SetMotionAdjustGainChr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_adjust_gain_chr);
HI_VOID VPSS_Sys_SetMotionAdjustCoring(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_adjust_coring);
HI_VOID VPSS_Sys_SetMotionAdjustGain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_adjust_gain);
HI_VOID VPSS_Sys_SetEdgeNorm1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_norm_1);
HI_VOID VPSS_Sys_SetEdgeNorm0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_norm_0);
HI_VOID VPSS_Sys_SetEdgeNorm3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_norm_3);
HI_VOID VPSS_Sys_SetEdgeNorm2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_norm_2);
HI_VOID VPSS_Sys_SetMcStrengthK3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mc_strength_k3);
HI_VOID VPSS_Sys_SetEdgeNorm5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_norm_5);
HI_VOID VPSS_Sys_SetEdgeNorm4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_norm_4);
HI_VOID VPSS_Sys_SetMcStrengthG3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mc_strength_g3);
HI_VOID VPSS_Sys_SetEdgeNorm7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_norm_7);
HI_VOID VPSS_Sys_SetEdgeNorm6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_norm_6);
HI_VOID VPSS_Sys_SetInterDiffThd0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 inter_diff_thd0);
HI_VOID VPSS_Sys_SetEdgeNorm9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_norm_9);
HI_VOID VPSS_Sys_SetEdgeNorm8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_norm_8);
HI_VOID VPSS_Sys_SetInterDiffThd1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 inter_diff_thd1);
HI_VOID VPSS_Sys_SetEdgeNorm11(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_norm_11);
HI_VOID VPSS_Sys_SetEdgeNorm10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_norm_10);
HI_VOID VPSS_Sys_SetInterDiffThd2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 inter_diff_thd2);
HI_VOID VPSS_Sys_SetEdgeScale(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_scale);
HI_VOID VPSS_Sys_SetEdgeCoring(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_coring);
HI_VOID VPSS_Sys_SetMcStrengthG0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mc_strength_g0);
HI_VOID VPSS_Sys_SetMcStrengthK2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mc_strength_k2);
HI_VOID VPSS_Sys_SetMcStrengthK1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mc_strength_k1);
HI_VOID VPSS_Sys_SetMcStrengthK0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mc_strength_k0);
HI_VOID VPSS_Sys_SetMcStrengthMaxg(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mc_strength_maxg);
HI_VOID VPSS_Sys_SetMcStrengthMing(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mc_strength_ming);
HI_VOID VPSS_Sys_SetMcStrengthG2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mc_strength_g2);
HI_VOID VPSS_Sys_SetMcStrengthG1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mc_strength_g1);
HI_VOID VPSS_Sys_SetKCMcbld(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_c_mcbld);
HI_VOID VPSS_Sys_SetKCMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_c_mcw);
HI_VOID VPSS_Sys_SetKYMcbld(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_y_mcbld);
HI_VOID VPSS_Sys_SetKYMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_y_mcw);
HI_VOID VPSS_Sys_SetG0McwAdj(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g0_mcw_adj);
HI_VOID VPSS_Sys_SetK0McwAdj(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_mcw_adj);
HI_VOID VPSS_Sys_SetX0McwAdj(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x0_mcw_adj);
HI_VOID VPSS_Sys_SetK1Mcbld(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_mcbld);
HI_VOID VPSS_Sys_SetK0Mcbld(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_mcbld);
HI_VOID VPSS_Sys_SetX0Mcbld(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x0_mcbld);
HI_VOID VPSS_Sys_SetK1McwAdj(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_mcw_adj);
HI_VOID VPSS_Sys_SetMcLaiBldmode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mc_lai_bldmode);
HI_VOID VPSS_Sys_SetKCurwMcbld(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_curw_mcbld);
HI_VOID VPSS_Sys_SetG0Mcbld(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g0_mcbld);
HI_VOID VPSS_Sys_SetMaGbmThd0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ma_gbm_thd0);
HI_VOID VPSS_Sys_SetMaGbmThd1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ma_gbm_thd1);
HI_VOID VPSS_Sys_SetMaGbmThd2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ma_gbm_thd2);
HI_VOID VPSS_Sys_SetMaGbmThd3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ma_gbm_thd3);
HI_VOID VPSS_Sys_SetMtfiltenGmd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mtfilten_gmd);
HI_VOID VPSS_Sys_SetMtth3Gmd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mtth3_gmd);
HI_VOID VPSS_Sys_SetMtth2Gmd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mtth2_gmd);
HI_VOID VPSS_Sys_SetMtth1Gmd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mtth1_gmd);
HI_VOID VPSS_Sys_SetMtth0Gmd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mtth0_gmd);
HI_VOID VPSS_Sys_SetKMagGmd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_mag_gmd);
HI_VOID VPSS_Sys_SetKDifhGmd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_difh_gmd);
HI_VOID VPSS_Sys_SetKMaxmagGmd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_maxmag_gmd);
HI_VOID VPSS_Sys_SetKhoredge(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 khoredge);
HI_VOID VPSS_Sys_SetKmagv2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 kmagv_2);
HI_VOID VPSS_Sys_SetKmagv1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 kmagv_1);
HI_VOID VPSS_Sys_SetKmagh2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 kmagh_2);
HI_VOID VPSS_Sys_SetKmagh1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 kmagh_1);
HI_VOID VPSS_Sys_SetScalerFramemotion(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 scaler_framemotion);
HI_VOID VPSS_Sys_SetMotionLimt2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_limt_2);
HI_VOID VPSS_Sys_SetMotionLimt1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_limt_1);
HI_VOID VPSS_Sys_SetFrameMagEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 frame_mag_en);
HI_VOID VPSS_Sys_SetScalerHoredge(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 scaler_horedge);
HI_VOID VPSS_Sys_SetEdgeStrCoringC(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge_str_coring_c);
HI_VOID VPSS_Sys_SetDirRatioC(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dir_ratio_c);
HI_VOID VPSS_Sys_SetHistThd3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hist_thd3);
HI_VOID VPSS_Sys_SetHistThd2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hist_thd2);
HI_VOID VPSS_Sys_SetHistThd1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hist_thd1);
HI_VOID VPSS_Sys_SetHistThd0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hist_thd0);
HI_VOID VPSS_Sys_SetMovCoringNorm(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mov_coring_norm);
HI_VOID VPSS_Sys_SetMovCoringTkr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mov_coring_tkr);
HI_VOID VPSS_Sys_SetMovCoringBlk(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mov_coring_blk);
HI_VOID VPSS_Sys_SetLasiMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 lasi_mode);
HI_VOID VPSS_Sys_SetBitsmov2r(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bitsmov2r);
HI_VOID VPSS_Sys_SetDiffMovblkThd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 diff_movblk_thd);
HI_VOID VPSS_Sys_SetUmThd2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 um_thd2);
HI_VOID VPSS_Sys_SetUmThd1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 um_thd1);
HI_VOID VPSS_Sys_SetUmThd0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 um_thd0);
HI_VOID VPSS_Sys_SetCoringBlk(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 coring_blk);
HI_VOID VPSS_Sys_SetCoringNorm(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 coring_norm);
HI_VOID VPSS_Sys_SetCoringTkr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 coring_tkr);
HI_VOID VPSS_Sys_SetPccHthd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 pcc_hthd);
HI_VOID VPSS_Sys_SetPccVthd3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 pcc_vthd3);
HI_VOID VPSS_Sys_SetPccVthd2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 pcc_vthd2);
HI_VOID VPSS_Sys_SetPccVthd1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 pcc_vthd1);
HI_VOID VPSS_Sys_SetPccVthd0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 pcc_vthd0);
HI_VOID VPSS_Sys_SetItdiffVthd3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 itdiff_vthd3);
HI_VOID VPSS_Sys_SetItdiffVthd2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 itdiff_vthd2);
HI_VOID VPSS_Sys_SetItdiffVthd1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 itdiff_vthd1);
HI_VOID VPSS_Sys_SetItdiffVthd0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 itdiff_vthd0);
HI_VOID VPSS_Sys_SetLasiMovThd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 lasi_mov_thd);
HI_VOID VPSS_Sys_SetLasiEdgeThd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 lasi_edge_thd);
HI_VOID VPSS_Sys_SetLasiCoringThd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 lasi_coring_thd);
HI_VOID VPSS_Sys_SetLasiTxtCoring(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 lasi_txt_coring);
HI_VOID VPSS_Sys_SetLasiTxtAlpha(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 lasi_txt_alpha);
HI_VOID VPSS_Sys_SetLasiTxtThd3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 lasi_txt_thd3);
HI_VOID VPSS_Sys_SetLasiTxtThd2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 lasi_txt_thd2);
HI_VOID VPSS_Sys_SetLasiTxtThd1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 lasi_txt_thd1);
HI_VOID VPSS_Sys_SetLasiTxtThd0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 lasi_txt_thd0);
HI_VOID VPSS_Sys_SetRegion1YStt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 region1_y_stt);
HI_VOID VPSS_Sys_SetRegion1YEnd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 region1_y_end);
HI_VOID VPSS_Sys_SetKRgdifycore(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_rgdifycore);
HI_VOID VPSS_Sys_SetGRgdifycore(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g_rgdifycore);
HI_VOID VPSS_Sys_SetCoreRgdify(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 core_rgdify);
HI_VOID VPSS_Sys_SetLmtRgdify(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 lmt_rgdify);
HI_VOID VPSS_Sys_SetCoefSadlpf(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 coef_sadlpf);
HI_VOID VPSS_Sys_SetKmvRgsad(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 kmv_rgsad);
HI_VOID VPSS_Sys_SetKTpdifRgsad(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_tpdif_rgsad);
HI_VOID VPSS_Sys_SetGTpdifRgsad(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g_tpdif_rgsad);
HI_VOID VPSS_Sys_SetThmagRgmv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 thmag_rgmv);
HI_VOID VPSS_Sys_SetThSaddifRgmv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 th_saddif_rgmv);
HI_VOID VPSS_Sys_SetTh0mvsadRgmv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 th_0mvsad_rgmv);
HI_VOID VPSS_Sys_SetCoreMagRg(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 core_mag_rg);
HI_VOID VPSS_Sys_SetLmtMagRg(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 lmt_mag_rg);
HI_VOID VPSS_Sys_SetCoreMvRgmvls(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 core_mv_rgmvls);
HI_VOID VPSS_Sys_SetKMvRgmvls(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_mv_rgmvls);
HI_VOID VPSS_Sys_SetCoreMagRgmvls(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 core_mag_rgmvls);
HI_VOID VPSS_Sys_SetKMagRgmvls(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_mag_rgmvls);
HI_VOID VPSS_Sys_SetThMvadjRgmvls(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 th_mvadj_rgmvls);
HI_VOID VPSS_Sys_SetEnMvadjRgmvls(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 en_mvadj_rgmvls);
HI_VOID VPSS_Sys_SetKSadRgls(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_sad_rgls);
HI_VOID VPSS_Sys_SetThMagRgls(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 th_mag_rgls);
HI_VOID VPSS_Sys_SetThSadRgls(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 th_sad_rgls);
HI_VOID VPSS_Sys_SetKSadcoreRgmv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_sadcore_rgmv);
HI_VOID VPSS_Sys_SetForceMven(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 force_mven);
HI_VOID VPSS_Sys_SetForceMvx(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 force_mvx);
HI_VOID VPSS_Sys_SetThBlkmvxMvdlt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 th_blkmvx_mvdlt);
HI_VOID VPSS_Sys_SetThRgmvxMvdlt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 th_rgmvx_mvdlt);
HI_VOID VPSS_Sys_SetThLsMvdlt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 th_ls_mvdlt);
HI_VOID VPSS_Sys_SetThVblkdistMvdlt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 th_vblkdist_mvdlt);
HI_VOID VPSS_Sys_SetThHblkdistMvdlt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 th_hblkdist_mvdlt);
HI_VOID VPSS_Sys_SetKSadcoreMvdlt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_sadcore_mvdlt);
HI_VOID VPSS_Sys_SetThMagMvdlt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 th_mag_mvdlt);
HI_VOID VPSS_Sys_SetGMagMvdlt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g_mag_mvdlt);
HI_VOID VPSS_Sys_SetThlSadMvdlt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 thl_sad_mvdlt);
HI_VOID VPSS_Sys_SetThhSadMvdlt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 thh_sad_mvdlt);
HI_VOID VPSS_Sys_SetKRglsw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_rglsw);
HI_VOID VPSS_Sys_SetKSimimvw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_simimvw);
HI_VOID VPSS_Sys_SetGhCoreSimimv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 gh_core_simimv);
HI_VOID VPSS_Sys_SetGlCoreSimimv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 gl_core_simimv);
HI_VOID VPSS_Sys_SetKCoreSimimv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_core_simimv);
HI_VOID VPSS_Sys_SetKCoreVsaddif(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_core_vsaddif);
HI_VOID VPSS_Sys_SetKRgsadadjMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_rgsadadj_mcw);
HI_VOID VPSS_Sys_SetCoreRgsadadjMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 core_rgsadadj_mcw);
HI_VOID VPSS_Sys_SetKMvyMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_mvy_mcw);
HI_VOID VPSS_Sys_SetCoreMvyMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 core_mvy_mcw);
HI_VOID VPSS_Sys_SetRgtbEnMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rgtb_en_mcw);
HI_VOID VPSS_Sys_SetCoreRgmagMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 core_rgmag_mcw);
HI_VOID VPSS_Sys_SetModeRgysadMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mode_rgysad_mcw);
HI_VOID VPSS_Sys_SetKVsaddifw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_vsaddifw);
HI_VOID VPSS_Sys_SetGhCoreVsadDif(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 gh_core_vsad_dif);
HI_VOID VPSS_Sys_SetGlCoreVsaddif(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 gl_core_vsaddif);
HI_VOID VPSS_Sys_SetG0RgmagMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g0_rgmag_mcw);
HI_VOID VPSS_Sys_SetK0RgmagMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_rgmag_mcw);
HI_VOID VPSS_Sys_SetX0RgmagMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x0_rgmag_mcw);
HI_VOID VPSS_Sys_SetX0RgsadMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x0_rgsad_mcw);
HI_VOID VPSS_Sys_SetCoreRgsadMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 core_rgsad_mcw);
HI_VOID VPSS_Sys_SetK1RgmagMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_rgmag_mcw);
HI_VOID VPSS_Sys_SetK1RgsadMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_rgsad_mcw);
HI_VOID VPSS_Sys_SetG0RgsadMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g0_rgsad_mcw);
HI_VOID VPSS_Sys_SetK0RgsadMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_rgsad_mcw);
HI_VOID VPSS_Sys_SetKRgsadMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_rgsad_mcw);
HI_VOID VPSS_Sys_SetXRgsadMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x_rgsad_mcw);
HI_VOID VPSS_Sys_SetK0SmrgMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_smrg_mcw);
HI_VOID VPSS_Sys_SetX0SmrgMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x0_smrg_mcw);
HI_VOID VPSS_Sys_SetK1TpmvdistMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_tpmvdist_mcw);
HI_VOID VPSS_Sys_SetG0TpmvdistMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g0_tpmvdist_mcw);
HI_VOID VPSS_Sys_SetK0TpmvdistMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_tpmvdist_mcw);
HI_VOID VPSS_Sys_SetX0TpmvdistMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x0_tpmvdist_mcw);
HI_VOID VPSS_Sys_SetKCoreTpmvdistMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_core_tpmvdist_mcw);
HI_VOID VPSS_Sys_SetBCoreTpmvdistMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 b_core_tpmvdist_mcw);
HI_VOID VPSS_Sys_SetKAvgmvdistMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_avgmvdist_mcw);
HI_VOID VPSS_Sys_SetKMinmvdistMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_minmvdist_mcw);
HI_VOID VPSS_Sys_SetKTbdifMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_tbdif_mcw);
HI_VOID VPSS_Sys_SetK0MaxMagMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_max_mag_mcw);
HI_VOID VPSS_Sys_SetK1MaxMagMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_max_mag_mcw);
HI_VOID VPSS_Sys_SetKMaxDifMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_max_dif_mcw);
HI_VOID VPSS_Sys_SetKMaxCoreMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_max_core_mcw);
HI_VOID VPSS_Sys_SetKDifvcoreMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_difvcore_mcw);
HI_VOID VPSS_Sys_SetKDifhcoreMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_difhcore_mcw);
HI_VOID VPSS_Sys_SetK1MagWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_mag_wnd_mcw);
HI_VOID VPSS_Sys_SetG0MagWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g0_mag_wnd_mcw);
HI_VOID VPSS_Sys_SetK0MagWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_mag_wnd_mcw);
HI_VOID VPSS_Sys_SetX0MagWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x0_mag_wnd_mcw);
HI_VOID VPSS_Sys_SetKTbmagMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_tbmag_mcw);
HI_VOID VPSS_Sys_SetG0SadWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g0_sad_wnd_mcw);
HI_VOID VPSS_Sys_SetK0SadWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_sad_wnd_mcw);
HI_VOID VPSS_Sys_SetX0SadWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x0_sad_wnd_mcw);
HI_VOID VPSS_Sys_SetG1MagWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g1_mag_wnd_mcw);
HI_VOID VPSS_Sys_SetG1SadWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g1_sad_wnd_mcw);
HI_VOID VPSS_Sys_SetK1SadWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_sad_wnd_mcw);
HI_VOID VPSS_Sys_SetBHvdifDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 b_hvdif_dw);
HI_VOID VPSS_Sys_SetBBhvdifDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 b_bhvdif_dw);
HI_VOID VPSS_Sys_SetKBhvdifDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_bhvdif_dw);
HI_VOID VPSS_Sys_SetCoreBhvdifDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 core_bhvdif_dw);
HI_VOID VPSS_Sys_SetGainLpfDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 gain_lpf_dw);
HI_VOID VPSS_Sys_SetKMaxHvdifDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_max_hvdif_dw);
HI_VOID VPSS_Sys_SetBMvDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 b_mv_dw);
HI_VOID VPSS_Sys_SetCoreMvDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 core_mv_dw);
HI_VOID VPSS_Sys_SetKDifvDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_difv_dw);
HI_VOID VPSS_Sys_SetCoreHvdifDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 core_hvdif_dw);
HI_VOID VPSS_Sys_SetK1HvdifDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_hvdif_dw);
HI_VOID VPSS_Sys_SetG0HvdifDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g0_hvdif_dw);
HI_VOID VPSS_Sys_SetK0HvdifDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_hvdif_dw);
HI_VOID VPSS_Sys_SetX0HvdifDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x0_hvdif_dw);
HI_VOID VPSS_Sys_SetK1MvDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_mv_dw);
HI_VOID VPSS_Sys_SetG0MvDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g0_mv_dw);
HI_VOID VPSS_Sys_SetK0MvDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_mv_dw);
HI_VOID VPSS_Sys_SetX0MvDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x0_mv_dw);
HI_VOID VPSS_Sys_SetK1MtDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_mt_dw);
HI_VOID VPSS_Sys_SetG0MtDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g0_mt_dw);
HI_VOID VPSS_Sys_SetK0MtDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_mt_dw);
HI_VOID VPSS_Sys_SetX0MtDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x0_mt_dw);
HI_VOID VPSS_Sys_SetBMtDw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 b_mt_dw);
HI_VOID VPSS_Sys_SetK1MvMt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_mv_mt);
HI_VOID VPSS_Sys_SetX0MvMt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x0_mv_mt);
HI_VOID VPSS_Sys_SetG0MvMt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g0_mv_mt);
HI_VOID VPSS_Sys_SetMclpfMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mclpf_mode);
HI_VOID VPSS_Sys_SetKPxlmagMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_pxlmag_mcw);
HI_VOID VPSS_Sys_SetXPxlmagMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x_pxlmag_mcw);
HI_VOID VPSS_Sys_SetRsPxlmagMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rs_pxlmag_mcw);
HI_VOID VPSS_Sys_SetGainMclpfh(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 gain_mclpfh);
HI_VOID VPSS_Sys_SetGainDnMclpfv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 gain_dn_mclpfv);
HI_VOID VPSS_Sys_SetGainUpMclpfv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 gain_up_mclpfv);
HI_VOID VPSS_Sys_SetGPxlmagMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g_pxlmag_mcw);
HI_VOID VPSS_Sys_SetKCVertw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_c_vertw);
HI_VOID VPSS_Sys_SetKYVertw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_y_vertw);
HI_VOID VPSS_Sys_SetKFstmtMc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_fstmt_mc);
HI_VOID VPSS_Sys_SetXFstmtMc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x_fstmt_mc);
HI_VOID VPSS_Sys_SetK1MvMc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_mv_mc);
HI_VOID VPSS_Sys_SetX0MvMc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x0_mv_mc);
HI_VOID VPSS_Sys_SetBdvMcpos(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bdv_mcpos);
HI_VOID VPSS_Sys_SetBdhMcpos(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 bdh_mcpos);
HI_VOID VPSS_Sys_SetKDelta(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_delta);
HI_VOID VPSS_Sys_SetKHfcoreMc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_hfcore_mc);
HI_VOID VPSS_Sys_SetXHfcoreMc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x_hfcore_mc);
HI_VOID VPSS_Sys_SetGSlmtMc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g_slmt_mc);
HI_VOID VPSS_Sys_SetKSlmtMc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_slmt_mc);
HI_VOID VPSS_Sys_SetXSlmtMc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x_slmt_mc);
HI_VOID VPSS_Sys_SetGFstmtMc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g_fstmt_mc);
HI_VOID VPSS_Sys_SetR0Mc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 r0_mc);
HI_VOID VPSS_Sys_SetC0Mc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 c0_mc);
HI_VOID VPSS_Sys_SetGHfcoreMc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g_hfcore_mc);
HI_VOID VPSS_Sys_SetMcmvrange(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mcmvrange);
HI_VOID VPSS_Sys_SetR1Mc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 r1_mc);
HI_VOID VPSS_Sys_SetC1Mc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 c1_mc);
HI_VOID VPSS_Sys_SetKFrcountMc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_frcount_mc);
HI_VOID VPSS_Sys_SetXFrcountMc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x_frcount_mc);
HI_VOID VPSS_Sys_SetScenechangeMc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 scenechange_mc);
HI_VOID VPSS_Sys_SetMcendc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mcendc);
HI_VOID VPSS_Sys_SetMcendr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mcendr);
HI_VOID VPSS_Sys_SetMcstartc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mcstartc);
HI_VOID VPSS_Sys_SetMcstartr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mcstartr);
HI_VOID VPSS_Sys_SetMovegain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 movegain);
HI_VOID VPSS_Sys_SetMovecorig(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 movecorig);
HI_VOID VPSS_Sys_SetMovethdl(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 movethdl);
HI_VOID VPSS_Sys_SetMovethdh(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 movethdh);
HI_VOID VPSS_Sys_SetMcNumtBlden(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mc_numt_blden);
HI_VOID VPSS_Sys_SetNumtGain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 numt_gain);
HI_VOID VPSS_Sys_SetNumtCoring(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 numt_coring);
HI_VOID VPSS_Sys_SetNumtLpfEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 numt_lpf_en);
HI_VOID VPSS_Sys_SetK1Hw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_hw);
HI_VOID VPSS_Sys_SetK0Hw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_hw);
HI_VOID VPSS_Sys_SetCoreHfvline(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 core_hfvline);
HI_VOID VPSS_Sys_SetK1Hfvline(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_hfvline);
HI_VOID VPSS_Sys_SetK0Hfvline(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_hfvline);
HI_VOID VPSS_Sys_SetCoreRglsw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 core_rglsw);
HI_VOID VPSS_Sys_SetGDifcoreMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g_difcore_mcw);
HI_VOID VPSS_Sys_SetSubpixMcEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 subpix_mc_en);
HI_VOID VPSS_Sys_SetCore1Hw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 core1_hw);
HI_VOID VPSS_Sys_SetKCore0Hw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_core0_hw);
HI_VOID VPSS_Sys_SetBCore0Hw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 b_core0_hw);
HI_VOID VPSS_Sys_SetGHw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g_hw);
HI_VOID VPSS_Sys_SetG0SadrWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g0_sadr_wnd_mcw);
HI_VOID VPSS_Sys_SetK0SadrWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k0_sadr_wnd_mcw);
HI_VOID VPSS_Sys_SetX0SadrWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 x0_sadr_wnd_mcw);
HI_VOID VPSS_Sys_SetRpK1SadWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rp_k1_sad_wnd_mcw);
HI_VOID VPSS_Sys_SetRpK1MagWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rp_k1_mag_wnd_mcw);
HI_VOID VPSS_Sys_SetThCurBlksad(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 th_cur_blksad);
HI_VOID VPSS_Sys_SetKMcdifvMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_mcdifv_mcw);
HI_VOID VPSS_Sys_SetKP1cfdifhMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_p1cfdifh_mcw);
HI_VOID VPSS_Sys_SetG1SadrWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 g1_sadr_wnd_mcw);
HI_VOID VPSS_Sys_SetK1SadrWndMcw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_sadr_wnd_mcw);
HI_VOID VPSS_Sys_SetThCurBlkmotion(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 th_cur_blkmotion);
HI_VOID VPSS_Sys_SetThlNeighBlksad(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 thl_neigh_blksad);
HI_VOID VPSS_Sys_SetThhNeighBlksad(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 thh_neigh_blksad);
HI_VOID VPSS_Sys_SetRpDifmvxthRgmv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rp_difmvxth_rgmv);
HI_VOID VPSS_Sys_SetRpMvxthRgmv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rp_mvxth_rgmv);
HI_VOID VPSS_Sys_SetRpcounterth(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rpcounterth);
HI_VOID VPSS_Sys_SetKRpcounter(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k_rpcounter);
HI_VOID VPSS_Sys_SetBlkmvUpdateEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 blkmv_update_en);
HI_VOID VPSS_Sys_SetThRgmvMag(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 th_rgmv_mag);
HI_VOID VPSS_Sys_SetRpMagthRgmv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rp_magth_rgmv);
HI_VOID VPSS_Sys_SetRpSadthRgmv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rp_sadth_rgmv);
HI_VOID VPSS_Sys_SetRpDifsadthRgmv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rp_difsadth_rgmv);
HI_VOID VPSS_Sys_SetDifvtMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 difvt_mode);
HI_VOID VPSS_Sys_SetRpEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rp_en);
HI_VOID VPSS_Sys_SetSubmvSadchkEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 submv_sadchk_en);
HI_VOID VPSS_Sys_SetK1TpdifRgsad(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 k1_tpdif_rgsad);
HI_VOID VPSS_Sys_SetRpDifsadthTb(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rp_difsadth_tb);
HI_VOID VPSS_Sys_SetRpDifmvxthSp(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 rp_difmvxth_sp);
HI_VOID VPSS_Sys_SetCntlut5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cntlut_5);
HI_VOID VPSS_Sys_SetCntlut4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cntlut_4);
HI_VOID VPSS_Sys_SetCntlut3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cntlut_3);
HI_VOID VPSS_Sys_SetCntlut2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cntlut_2);
HI_VOID VPSS_Sys_SetCntlut1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cntlut_1);
HI_VOID VPSS_Sys_SetCntlut0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cntlut_0);
HI_VOID VPSS_Sys_SetMcwScntGain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mcw_scnt_gain);
HI_VOID VPSS_Sys_SetMcwScntEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mcw_scnt_en);
HI_VOID VPSS_Sys_SetMcMtshift(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mc_mtshift);
HI_VOID VPSS_Sys_SetCntlut8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cntlut_8);
HI_VOID VPSS_Sys_SetCntlut7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cntlut_7);
HI_VOID VPSS_Sys_SetCntlut6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cntlut_6);
HI_VOID VPSS_Sys_SetDemoBorder(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 demo_border);
HI_VOID VPSS_Sys_SetDemoModeR(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 demo_mode_r);
HI_VOID VPSS_Sys_SetDemoModeL(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 demo_mode_l);
HI_VOID VPSS_Sys_SetDemoEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 demo_en);
HI_VOID VPSS_Sys_SetHlmscEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hlmsc_en);
HI_VOID VPSS_Sys_SetHchmscEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hchmsc_en);
HI_VOID VPSS_Sys_SetHlmidEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hlmid_en);
HI_VOID VPSS_Sys_SetHchmidEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hchmid_en);
HI_VOID VPSS_Sys_SetHlfirEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hlfir_en);
HI_VOID VPSS_Sys_SetHchfirEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hchfir_en);
HI_VOID VPSS_Sys_SetHfirOrder(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hfir_order);
HI_VOID VPSS_Sys_SetHratio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hratio);
HI_VOID VPSS_Sys_SetHorLoffset(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hor_loffset);
HI_VOID VPSS_Sys_SetHorCoffset(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 hor_coffset);
HI_VOID VPSS_Sys_SetVlmscEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vlmsc_en);
HI_VOID VPSS_Sys_SetVchmscEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vchmsc_en);
HI_VOID VPSS_Sys_SetVlmidEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vlmid_en);
HI_VOID VPSS_Sys_SetVchmidEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vchmid_en);
HI_VOID VPSS_Sys_SetVlfirEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vlfir_en);
HI_VOID VPSS_Sys_SetVchfirEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vchfir_en);
HI_VOID VPSS_Sys_SetZmeOutFmt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 zme_out_fmt);
HI_VOID VPSS_Sys_SetVratio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vratio);
HI_VOID VPSS_Sys_SetVlumaOffset(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vluma_offset);
HI_VOID VPSS_Sys_SetVchromaOffset(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vchroma_offset);
HI_VOID VPSS_Sys_SetDbmOutMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbm_out_mode);
HI_VOID VPSS_Sys_SetDetHyEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 det_hy_en);
HI_VOID VPSS_Sys_SetDbmDemoMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbm_demo_mode);
HI_VOID VPSS_Sys_SetDbmDemoEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbm_demo_en);
HI_VOID VPSS_Sys_SetDbLumHorEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_en);
HI_VOID VPSS_Sys_SetNrEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nr_en);
HI_VOID VPSS_Sys_SetDmEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_en);
HI_VOID VPSS_Sys_SetDbEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_en);
HI_VOID VPSS_Sys_SetDbmDemoPosX(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbm_demo_pos_x);
HI_VOID VPSS_Sys_SetDbCtrstThresh(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_ctrst_thresh);
HI_VOID VPSS_Sys_SetDbGradSubRatio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_grad_sub_ratio);
HI_VOID VPSS_Sys_SetDbLumHBlkSize(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_h_blk_size);
HI_VOID VPSS_Sys_SetDbLumHorTxtWinSize(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_txt_win_size);
HI_VOID VPSS_Sys_SetDbGlobalDbStrenthLum(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_global_db_strenth_lum);
HI_VOID VPSS_Sys_SetDbLumHorFilterSel(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_filter_sel);
HI_VOID VPSS_Sys_SetDbLumHorScaleRatio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_scale_ratio);
HI_VOID VPSS_Sys_SetDbLumHorHfVarGain2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_hf_var_gain2);
HI_VOID VPSS_Sys_SetDbLumHorHfVarGain1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_hf_var_gain1);
HI_VOID VPSS_Sys_SetDbLumHorHfVarCore(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_hf_var_core);
HI_VOID VPSS_Sys_SetDbLumHorHfDiffGain2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_hf_diff_gain2);
HI_VOID VPSS_Sys_SetDbLumHorHfDiffGain1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_hf_diff_gain1);
HI_VOID VPSS_Sys_SetDbLumHorHfDiffCore(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_hf_diff_core);
HI_VOID VPSS_Sys_SetDbLumHorBordAdjGain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_bord_adj_gain);
HI_VOID VPSS_Sys_SetDbLumHorAdjGain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_adj_gain);
HI_VOID VPSS_Sys_SetDbMaxLumHorDbDist(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_max_lum_hor_db_dist);
HI_VOID VPSS_Sys_SetDbCtrstAdjGain2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_ctrst_adj_gain2);
HI_VOID VPSS_Sys_SetDbCtrstAdjGain1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_ctrst_adj_gain1);
HI_VOID VPSS_Sys_SetDbDirSmoothMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_smooth_mode);
HI_VOID VPSS_Sys_SetDbCtrstAdjCore(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_ctrst_adj_core);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p7);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p6);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p5);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p4);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p3);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p2);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p1);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p0);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP15(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p15);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP14(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p14);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP13(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p13);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP12(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p12);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP11(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p11);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p10);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p9);
HI_VOID VPSS_Sys_SetDbLumHorDeltaLutP8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_hor_delta_lut_p8);
HI_VOID VPSS_Sys_SetDbLumHStrFadeLutP9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_h_str_fade_lut_p9);
HI_VOID VPSS_Sys_SetDbLumHStrFadeLutP8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_h_str_fade_lut_p8);
HI_VOID VPSS_Sys_SetDbLumHStrFadeLutP7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_h_str_fade_lut_p7);
HI_VOID VPSS_Sys_SetDbLumHStrFadeLutP6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_h_str_fade_lut_p6);
HI_VOID VPSS_Sys_SetDbLumHStrFadeLutP5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_h_str_fade_lut_p5);
HI_VOID VPSS_Sys_SetDbLumHStrFadeLutP4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_h_str_fade_lut_p4);
HI_VOID VPSS_Sys_SetDbLumHStrFadeLutP3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_h_str_fade_lut_p3);
HI_VOID VPSS_Sys_SetDbLumHStrFadeLutP2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_h_str_fade_lut_p2);
HI_VOID VPSS_Sys_SetDbLumHStrFadeLutP1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_h_str_fade_lut_p1);
HI_VOID VPSS_Sys_SetDbLumHStrFadeLutP0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_h_str_fade_lut_p0);
HI_VOID VPSS_Sys_SetDbLumHStrFadeLutP11(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_h_str_fade_lut_p11);
HI_VOID VPSS_Sys_SetDbLumHStrFadeLutP10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_lum_h_str_fade_lut_p10);
HI_VOID VPSS_Sys_SetDbDirStrGainLutP7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_gain_lut_p7);
HI_VOID VPSS_Sys_SetDbDirStrGainLutP6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_gain_lut_p6);
HI_VOID VPSS_Sys_SetDbDirStrGainLutP5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_gain_lut_p5);
HI_VOID VPSS_Sys_SetDbDirStrGainLutP4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_gain_lut_p4);
HI_VOID VPSS_Sys_SetDbDirStrGainLutP3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_gain_lut_p3);
HI_VOID VPSS_Sys_SetDbDirStrGainLutP2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_gain_lut_p2);
HI_VOID VPSS_Sys_SetDbDirStrGainLutP1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_gain_lut_p1);
HI_VOID VPSS_Sys_SetDbDirStrGainLutP0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_gain_lut_p0);
HI_VOID VPSS_Sys_SetDbDirStrLutP7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p7);
HI_VOID VPSS_Sys_SetDbDirStrLutP6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p6);
HI_VOID VPSS_Sys_SetDbDirStrLutP5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p5);
HI_VOID VPSS_Sys_SetDbDirStrLutP4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p4);
HI_VOID VPSS_Sys_SetDbDirStrLutP3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p3);
HI_VOID VPSS_Sys_SetDbDirStrLutP2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p2);
HI_VOID VPSS_Sys_SetDbDirStrLutP1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p1);
HI_VOID VPSS_Sys_SetDbDirStrLutP0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p0);
HI_VOID VPSS_Sys_SetDbDirStrLutP15(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p15);
HI_VOID VPSS_Sys_SetDbDirStrLutP14(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p14);
HI_VOID VPSS_Sys_SetDbDirStrLutP13(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p13);
HI_VOID VPSS_Sys_SetDbDirStrLutP12(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p12);
HI_VOID VPSS_Sys_SetDbDirStrLutP11(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p11);
HI_VOID VPSS_Sys_SetDbDirStrLutP10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p10);
HI_VOID VPSS_Sys_SetDbDirStrLutP9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p9);
HI_VOID VPSS_Sys_SetDbDirStrLutP8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 db_dir_str_lut_p8);
HI_VOID VPSS_Sys_SetDbdHyThdEdge(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_hy_thd_edge);
HI_VOID VPSS_Sys_SetDbdHyThdTxt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_hy_thd_txt);
HI_VOID VPSS_Sys_SetDbdDetLutWgt7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt7);
HI_VOID VPSS_Sys_SetDbdDetLutWgt6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt6);
HI_VOID VPSS_Sys_SetDbdDetLutWgt5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt5);
HI_VOID VPSS_Sys_SetDbdDetLutWgt4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt4);
HI_VOID VPSS_Sys_SetDbdDetLutWgt3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt3);
HI_VOID VPSS_Sys_SetDbdDetLutWgt2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt2);
HI_VOID VPSS_Sys_SetDbdDetLutWgt1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt1);
HI_VOID VPSS_Sys_SetDbdDetLutWgt0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt0);
HI_VOID VPSS_Sys_SetDbdDetLutWgt15(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt15);
HI_VOID VPSS_Sys_SetDbdDetLutWgt14(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt14);
HI_VOID VPSS_Sys_SetDbdDetLutWgt13(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt13);
HI_VOID VPSS_Sys_SetDbdDetLutWgt12(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt12);
HI_VOID VPSS_Sys_SetDbdDetLutWgt11(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt11);
HI_VOID VPSS_Sys_SetDbdDetLutWgt10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt10);
HI_VOID VPSS_Sys_SetDbdDetLutWgt9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt9);
HI_VOID VPSS_Sys_SetDbdDetLutWgt8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_det_lut_wgt8);
HI_VOID VPSS_Sys_SetDbdHyRtnBdTxt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_hy_rtn_bd_txt);
HI_VOID VPSS_Sys_SetDbdHyTstBlkNum(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_hy_tst_blk_num);
HI_VOID VPSS_Sys_SetDbdHyRdx8binLut1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_hy_rdx8bin_lut1);
HI_VOID VPSS_Sys_SetDbdHyRdx8binLut0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_hy_rdx8bin_lut0);
HI_VOID VPSS_Sys_SetDbdHyRdx8binLut3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_hy_rdx8bin_lut3);
HI_VOID VPSS_Sys_SetDbdHyRdx8binLut2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_hy_rdx8bin_lut2);
HI_VOID VPSS_Sys_SetDbdHyRdx8binLut5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_hy_rdx8bin_lut5);
HI_VOID VPSS_Sys_SetDbdHyRdx8binLut4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_hy_rdx8bin_lut4);
HI_VOID VPSS_Sys_SetDbdHyRdx8binLut6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_hy_rdx8bin_lut6);
HI_VOID VPSS_Sys_SetDbdHyMaxBlkSize(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_hy_max_blk_size);
HI_VOID VPSS_Sys_SetDbdMinBlkSize(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_min_blk_size);
HI_VOID VPSS_Sys_SetDbdThrFlat(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dbd_thr_flat);
HI_VOID VPSS_Sys_SetDmOppAngCtrstDiv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_opp_ang_ctrst_div);
HI_VOID VPSS_Sys_SetDmOppAngCtrstT(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_opp_ang_ctrst_t);
HI_VOID VPSS_Sys_SetDmCtrstThresh(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_ctrst_thresh);
HI_VOID VPSS_Sys_SetDmGradSubRatio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_grad_sub_ratio);
HI_VOID VPSS_Sys_SetDmGlobalStr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_global_str);
HI_VOID VPSS_Sys_SetDmInitValStep(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_init_val_step);
HI_VOID VPSS_Sys_SetDmMmfSet(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_mmf_set);
HI_VOID VPSS_Sys_SetDmSwWhtLutP3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_sw_wht_lut_p3);
HI_VOID VPSS_Sys_SetDmSwWhtLutP2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_sw_wht_lut_p2);
HI_VOID VPSS_Sys_SetDmSwWhtLutP1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_sw_wht_lut_p1);
HI_VOID VPSS_Sys_SetDmSwWhtLutP0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_sw_wht_lut_p0);
HI_VOID VPSS_Sys_SetDmLimitT10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_limit_t_10);
HI_VOID VPSS_Sys_SetDmLimitT(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_limit_t);
HI_VOID VPSS_Sys_SetDmSwWhtLutP4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_sw_wht_lut_p4);
HI_VOID VPSS_Sys_SetDmDirStrGainLutP7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_gain_lut_p7);
HI_VOID VPSS_Sys_SetDmDirStrGainLutP6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_gain_lut_p6);
HI_VOID VPSS_Sys_SetDmDirStrGainLutP5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_gain_lut_p5);
HI_VOID VPSS_Sys_SetDmDirStrGainLutP4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_gain_lut_p4);
HI_VOID VPSS_Sys_SetDmDirStrGainLutP3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_gain_lut_p3);
HI_VOID VPSS_Sys_SetDmDirStrGainLutP2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_gain_lut_p2);
HI_VOID VPSS_Sys_SetDmDirStrGainLutP1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_gain_lut_p1);
HI_VOID VPSS_Sys_SetDmDirStrGainLutP0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_gain_lut_p0);
HI_VOID VPSS_Sys_SetDmDirStrLutP7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p7);
HI_VOID VPSS_Sys_SetDmDirStrLutP6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p6);
HI_VOID VPSS_Sys_SetDmDirStrLutP5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p5);
HI_VOID VPSS_Sys_SetDmDirStrLutP4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p4);
HI_VOID VPSS_Sys_SetDmDirStrLutP3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p3);
HI_VOID VPSS_Sys_SetDmDirStrLutP2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p2);
HI_VOID VPSS_Sys_SetDmDirStrLutP1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p1);
HI_VOID VPSS_Sys_SetDmDirStrLutP0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p0);
HI_VOID VPSS_Sys_SetDmDirStrLutP15(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p15);
HI_VOID VPSS_Sys_SetDmDirStrLutP14(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p14);
HI_VOID VPSS_Sys_SetDmDirStrLutP13(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p13);
HI_VOID VPSS_Sys_SetDmDirStrLutP12(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p12);
HI_VOID VPSS_Sys_SetDmDirStrLutP11(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p11);
HI_VOID VPSS_Sys_SetDmDirStrLutP10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p10);
HI_VOID VPSS_Sys_SetDmDirStrLutP9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p9);
HI_VOID VPSS_Sys_SetDmDirStrLutP8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_str_lut_p8);
HI_VOID VPSS_Sys_SetDmMmfLimitEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_mmf_limit_en);
HI_VOID VPSS_Sys_SetDmMndirOppCtrstT(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_mndir_opp_ctrst_t);
HI_VOID VPSS_Sys_SetDmCswTrsntSt10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_csw_trsnt_st_10);
HI_VOID VPSS_Sys_SetDmLswRatio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_lsw_ratio);
HI_VOID VPSS_Sys_SetDmCswTrsntSt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_csw_trsnt_st);
HI_VOID VPSS_Sys_SetDmLwCtrstT10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_lw_ctrst_t_10);
HI_VOID VPSS_Sys_SetDmLwCtrstT(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_lw_ctrst_t);
HI_VOID VPSS_Sys_SetDmCswTrsntLt(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_csw_trsnt_lt);
HI_VOID VPSS_Sys_SetDmMmfLr10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_mmf_lr_10);
HI_VOID VPSS_Sys_SetDmMmfLr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_mmf_lr);
HI_VOID VPSS_Sys_SetDmCswTrsntLt10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_csw_trsnt_lt_10);
HI_VOID VPSS_Sys_SetDmMmfSr10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_mmf_sr_10);
HI_VOID VPSS_Sys_SetDmMmfSr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_mmf_sr);
HI_VOID VPSS_Sys_SetDmDirBlendStr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_dir_blend_str);
HI_VOID VPSS_Sys_SetDmLimResBlendStr2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_lim_res_blend_str2);
HI_VOID VPSS_Sys_SetDmLimResBlendStr1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_lim_res_blend_str1);
HI_VOID VPSS_Sys_SetDmLimitLswRatio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_limit_lsw_ratio);
HI_VOID VPSS_Sys_SetDmTransBandLutP4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p4);
HI_VOID VPSS_Sys_SetDmTransBandLutP3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p3);
HI_VOID VPSS_Sys_SetDmTransBandLutP2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p2);
HI_VOID VPSS_Sys_SetDmTransBandLutP1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p1);
HI_VOID VPSS_Sys_SetDmTransBandLutP0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p0);
HI_VOID VPSS_Sys_SetDmTransBandLutP9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p9);
HI_VOID VPSS_Sys_SetDmTransBandLutP8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p8);
HI_VOID VPSS_Sys_SetDmTransBandLutP7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p7);
HI_VOID VPSS_Sys_SetDmTransBandLutP6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p6);
HI_VOID VPSS_Sys_SetDmTransBandLutP5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p5);
HI_VOID VPSS_Sys_SetDmTransBandLutP14(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p14);
HI_VOID VPSS_Sys_SetDmTransBandLutP13(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p13);
HI_VOID VPSS_Sys_SetDmTransBandLutP12(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p12);
HI_VOID VPSS_Sys_SetDmTransBandLutP11(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p11);
HI_VOID VPSS_Sys_SetDmTransBandLutP10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p10);
HI_VOID VPSS_Sys_SetDmTransBandLutP19(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p19);
HI_VOID VPSS_Sys_SetDmTransBandLutP18(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p18);
HI_VOID VPSS_Sys_SetDmTransBandLutP17(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p17);
HI_VOID VPSS_Sys_SetDmTransBandLutP16(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p16);
HI_VOID VPSS_Sys_SetDmTransBandLutP15(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p15);
HI_VOID VPSS_Sys_SetDmTransBandLutP24(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p24);
HI_VOID VPSS_Sys_SetDmTransBandLutP23(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p23);
HI_VOID VPSS_Sys_SetDmTransBandLutP22(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p22);
HI_VOID VPSS_Sys_SetDmTransBandLutP21(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p21);
HI_VOID VPSS_Sys_SetDmTransBandLutP20(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p20);
HI_VOID VPSS_Sys_SetDmTransBandLutP29(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p29);
HI_VOID VPSS_Sys_SetDmTransBandLutP28(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p28);
HI_VOID VPSS_Sys_SetDmTransBandLutP27(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p27);
HI_VOID VPSS_Sys_SetDmTransBandLutP26(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p26);
HI_VOID VPSS_Sys_SetDmTransBandLutP25(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p25);
HI_VOID VPSS_Sys_SetDmTransBandLutP30(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dm_trans_band_lut_p30);
HI_VOID VPSS_Sys_SetVpssDbBordFlag0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_0);
HI_VOID VPSS_Sys_SetVpssDbBordFlag1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_1);
HI_VOID VPSS_Sys_SetVpssDbBordFlag2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_2);
HI_VOID VPSS_Sys_SetVpssDbBordFlag3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_3);
HI_VOID VPSS_Sys_SetVpssDbBordFlag4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_4);
HI_VOID VPSS_Sys_SetVpssDbBordFlag5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_5);
HI_VOID VPSS_Sys_SetVpssDbBordFlag6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_6);
HI_VOID VPSS_Sys_SetVpssDbBordFlag7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_7);
HI_VOID VPSS_Sys_SetVpssDbBordFlag8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_8);
HI_VOID VPSS_Sys_SetVpssDbBordFlag9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_9);
HI_VOID VPSS_Sys_SetVpssDbBordFlag10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_10);
HI_VOID VPSS_Sys_SetVpssDbBordFlag11(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_11);
HI_VOID VPSS_Sys_SetVpssDbBordFlag12(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_12);
HI_VOID VPSS_Sys_SetVpssDbBordFlag13(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_13);
HI_VOID VPSS_Sys_SetVpssDbBordFlag14(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_14);
HI_VOID VPSS_Sys_SetVpssDbBordFlag15(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_15);
HI_VOID VPSS_Sys_SetVpssDbBordFlag16(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_16);
HI_VOID VPSS_Sys_SetVpssDbBordFlag17(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_17);
HI_VOID VPSS_Sys_SetVpssDbBordFlag18(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_18);
HI_VOID VPSS_Sys_SetVpssDbBordFlag19(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_19);
HI_VOID VPSS_Sys_SetVpssDbBordFlag20(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_20);
HI_VOID VPSS_Sys_SetVpssDbBordFlag21(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_21);
HI_VOID VPSS_Sys_SetVpssDbBordFlag22(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_22);
HI_VOID VPSS_Sys_SetVpssDbBordFlag23(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_23);
HI_VOID VPSS_Sys_SetVpssDbBordFlag24(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_24);
HI_VOID VPSS_Sys_SetVpssDbBordFlag25(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_25);
HI_VOID VPSS_Sys_SetVpssDbBordFlag26(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_26);
HI_VOID VPSS_Sys_SetVpssDbBordFlag27(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_27);
HI_VOID VPSS_Sys_SetVpssDbBordFlag28(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_28);
HI_VOID VPSS_Sys_SetVpssDbBordFlag29(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_29);
HI_VOID VPSS_Sys_SetVpssDbBordFlag30(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_30);
HI_VOID VPSS_Sys_SetVpssDbBordFlag31(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 vpss_db_bord_flag_31);
HI_VOID VPSS_Sys_SetTestEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 test_en);
HI_VOID VPSS_Sys_SetEdgeprefilteren(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgeprefilteren);
HI_VOID VPSS_Sys_SetColorweighten(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 colorweighten);
HI_VOID VPSS_Sys_SetMotionedgeweighten(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motionedgeweighten);
HI_VOID VPSS_Sys_SetCnr2den(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cnr2den);
HI_VOID VPSS_Sys_SetYnr2den(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ynr2den);
HI_VOID VPSS_Sys_SetEdgeoriratio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgeoriratio);
HI_VOID VPSS_Sys_SetEdgeminratio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgeminratio);
HI_VOID VPSS_Sys_SetEdgemaxratio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemaxratio);
HI_VOID VPSS_Sys_SetEdgeoristrength(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgeoristrength);
HI_VOID VPSS_Sys_SetEdgeminstrength(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgeminstrength);
HI_VOID VPSS_Sys_SetEdgemaxstrength(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemaxstrength);
HI_VOID VPSS_Sys_SetEdgestrth3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgestrth3);
HI_VOID VPSS_Sys_SetEdgestrth2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgestrth2);
HI_VOID VPSS_Sys_SetEdgestrth1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgestrth1);
HI_VOID VPSS_Sys_SetEdgestrk3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgestrk3);
HI_VOID VPSS_Sys_SetEdgestrk2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgestrk2);
HI_VOID VPSS_Sys_SetEdgestrk1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgestrk1);
HI_VOID VPSS_Sys_SetEdgemeanth3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeanth3);
HI_VOID VPSS_Sys_SetEdgemeanth2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeanth2);
HI_VOID VPSS_Sys_SetEdgemeanth1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeanth1);
HI_VOID VPSS_Sys_SetEdgemeanth6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeanth6);
HI_VOID VPSS_Sys_SetEdgemeanth5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeanth5);
HI_VOID VPSS_Sys_SetEdgemeanth4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeanth4);
HI_VOID VPSS_Sys_SetEdgemeanth8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeanth8);
HI_VOID VPSS_Sys_SetEdgemeanth7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeanth7);
HI_VOID VPSS_Sys_SetEdgemeank4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeank4);
HI_VOID VPSS_Sys_SetEdgemeank3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeank3);
HI_VOID VPSS_Sys_SetEdgemeank2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeank2);
HI_VOID VPSS_Sys_SetEdgemeank1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeank1);
HI_VOID VPSS_Sys_SetEdgemeank8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeank8);
HI_VOID VPSS_Sys_SetEdgemeank7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeank7);
HI_VOID VPSS_Sys_SetEdgemeank6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeank6);
HI_VOID VPSS_Sys_SetEdgemeank5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edgemeank5);
HI_VOID VPSS_Sys_SetC2dwinheight(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 c2dwinheight);
HI_VOID VPSS_Sys_SetC2dwinwidth(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 c2dwinwidth);
HI_VOID VPSS_Sys_SetY2dwinheight(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 y2dwinheight);
HI_VOID VPSS_Sys_SetY2dwinwidth(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 y2dwinwidth);
HI_VOID VPSS_Sys_SetCsnrstr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 csnrstr);
HI_VOID VPSS_Sys_SetYsnrstr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ysnrstr);
HI_VOID VPSS_Sys_SetStroffset3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 stroffset3);
HI_VOID VPSS_Sys_SetStroffset2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 stroffset2);
HI_VOID VPSS_Sys_SetStroffset1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 stroffset1);
HI_VOID VPSS_Sys_SetStroffset0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 stroffset0);
HI_VOID VPSS_Sys_SetCstradjust(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cstradjust);
HI_VOID VPSS_Sys_SetYstradjust(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ystradjust);
HI_VOID VPSS_Sys_SetScenechangeth(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 scenechangeth);
HI_VOID VPSS_Sys_SetRatio3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ratio3);
HI_VOID VPSS_Sys_SetRatio2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ratio2);
HI_VOID VPSS_Sys_SetRatio1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ratio1);
HI_VOID VPSS_Sys_SetRatio6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ratio6);
HI_VOID VPSS_Sys_SetRatio5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ratio5);
HI_VOID VPSS_Sys_SetRatio4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ratio4);
HI_VOID VPSS_Sys_SetRatio8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ratio8);
HI_VOID VPSS_Sys_SetRatio7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ratio7);
HI_VOID VPSS_Sys_SetEdge3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge3);
HI_VOID VPSS_Sys_SetEdge2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge2);
HI_VOID VPSS_Sys_SetEdge1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 edge1);
HI_VOID VPSS_Sys_SetTestColorCr(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 test_color_cr);
HI_VOID VPSS_Sys_SetTestColorCb(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 test_color_cb);
HI_VOID VPSS_Sys_SetScenechangeMode2En(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 scenechange_mode2_en);
HI_VOID VPSS_Sys_SetScenechangeBldcore(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 scenechange_bldcore);
HI_VOID VPSS_Sys_SetScenechangeBldk(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 scenechange_bldk);
HI_VOID VPSS_Sys_SetScenechangeMode1En(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 scenechange_mode1_en);
HI_VOID VPSS_Sys_SetScenechangeEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 scenechange_en);
HI_VOID VPSS_Sys_SetScenechangeInfo(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 scenechange_info);
HI_VOID VPSS_Sys_SetMotionalpha(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motionalpha);
HI_VOID VPSS_Sys_SetCbcrWeight1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cbcr_weight1);
HI_VOID VPSS_Sys_SetCrEnd1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cr_end1);
HI_VOID VPSS_Sys_SetCbEnd1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cb_end1);
HI_VOID VPSS_Sys_SetCrBegin1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cr_begin1);
HI_VOID VPSS_Sys_SetCbBegin1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cb_begin1);
HI_VOID VPSS_Sys_SetCbcrWeight2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cbcr_weight2);
HI_VOID VPSS_Sys_SetCrEnd2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cr_end2);
HI_VOID VPSS_Sys_SetCbEnd2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cb_end2);
HI_VOID VPSS_Sys_SetCrBegin2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cr_begin2);
HI_VOID VPSS_Sys_SetCbBegin2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cb_begin2);
HI_VOID VPSS_Sys_SetMotionEdgeLut07(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut07);
HI_VOID VPSS_Sys_SetMotionEdgeLut06(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut06);
HI_VOID VPSS_Sys_SetMotionEdgeLut05(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut05);
HI_VOID VPSS_Sys_SetMotionEdgeLut04(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut04);
HI_VOID VPSS_Sys_SetMotionEdgeLut03(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut03);
HI_VOID VPSS_Sys_SetMotionEdgeLut02(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut02);
HI_VOID VPSS_Sys_SetMotionEdgeLut01(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut01);
HI_VOID VPSS_Sys_SetMotionEdgeLut00(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut00);
HI_VOID VPSS_Sys_SetMotionEdgeLut0f(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut0f);
HI_VOID VPSS_Sys_SetMotionEdgeLut0e(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut0e);
HI_VOID VPSS_Sys_SetMotionEdgeLut0d(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut0d);
HI_VOID VPSS_Sys_SetMotionEdgeLut0c(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut0c);
HI_VOID VPSS_Sys_SetMotionEdgeLut0b(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut0b);
HI_VOID VPSS_Sys_SetMotionEdgeLut0a(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut0a);
HI_VOID VPSS_Sys_SetMotionEdgeLut09(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut09);
HI_VOID VPSS_Sys_SetMotionEdgeLut08(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut08);
HI_VOID VPSS_Sys_SetMotionEdgeLut17(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut17);
HI_VOID VPSS_Sys_SetMotionEdgeLut16(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut16);
HI_VOID VPSS_Sys_SetMotionEdgeLut15(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut15);
HI_VOID VPSS_Sys_SetMotionEdgeLut14(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut14);
HI_VOID VPSS_Sys_SetMotionEdgeLut13(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut13);
HI_VOID VPSS_Sys_SetMotionEdgeLut12(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut12);
HI_VOID VPSS_Sys_SetMotionEdgeLut11(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut11);
HI_VOID VPSS_Sys_SetMotionEdgeLut10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut10);
HI_VOID VPSS_Sys_SetMotionEdgeLut1f(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut1f);
HI_VOID VPSS_Sys_SetMotionEdgeLut1e(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut1e);
HI_VOID VPSS_Sys_SetMotionEdgeLut1d(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut1d);
HI_VOID VPSS_Sys_SetMotionEdgeLut1c(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut1c);
HI_VOID VPSS_Sys_SetMotionEdgeLut1b(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut1b);
HI_VOID VPSS_Sys_SetMotionEdgeLut1a(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut1a);
HI_VOID VPSS_Sys_SetMotionEdgeLut19(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut19);
HI_VOID VPSS_Sys_SetMotionEdgeLut18(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut18);
HI_VOID VPSS_Sys_SetMotionEdgeLut27(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut27);
HI_VOID VPSS_Sys_SetMotionEdgeLut26(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut26);
HI_VOID VPSS_Sys_SetMotionEdgeLut25(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut25);
HI_VOID VPSS_Sys_SetMotionEdgeLut24(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut24);
HI_VOID VPSS_Sys_SetMotionEdgeLut23(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut23);
HI_VOID VPSS_Sys_SetMotionEdgeLut22(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut22);
HI_VOID VPSS_Sys_SetMotionEdgeLut21(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut21);
HI_VOID VPSS_Sys_SetMotionEdgeLut20(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut20);
HI_VOID VPSS_Sys_SetMotionEdgeLut2f(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut2f);
HI_VOID VPSS_Sys_SetMotionEdgeLut2e(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut2e);
HI_VOID VPSS_Sys_SetMotionEdgeLut2d(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut2d);
HI_VOID VPSS_Sys_SetMotionEdgeLut2c(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut2c);
HI_VOID VPSS_Sys_SetMotionEdgeLut2b(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut2b);
HI_VOID VPSS_Sys_SetMotionEdgeLut2a(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut2a);
HI_VOID VPSS_Sys_SetMotionEdgeLut29(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut29);
HI_VOID VPSS_Sys_SetMotionEdgeLut28(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut28);
HI_VOID VPSS_Sys_SetMotionEdgeLut37(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut37);
HI_VOID VPSS_Sys_SetMotionEdgeLut36(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut36);
HI_VOID VPSS_Sys_SetMotionEdgeLut35(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut35);
HI_VOID VPSS_Sys_SetMotionEdgeLut34(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut34);
HI_VOID VPSS_Sys_SetMotionEdgeLut33(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut33);
HI_VOID VPSS_Sys_SetMotionEdgeLut32(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut32);
HI_VOID VPSS_Sys_SetMotionEdgeLut31(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut31);
HI_VOID VPSS_Sys_SetMotionEdgeLut30(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut30);
HI_VOID VPSS_Sys_SetMotionEdgeLut3f(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut3f);
HI_VOID VPSS_Sys_SetMotionEdgeLut3e(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut3e);
HI_VOID VPSS_Sys_SetMotionEdgeLut3d(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut3d);
HI_VOID VPSS_Sys_SetMotionEdgeLut3c(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut3c);
HI_VOID VPSS_Sys_SetMotionEdgeLut3b(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut3b);
HI_VOID VPSS_Sys_SetMotionEdgeLut3a(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut3a);
HI_VOID VPSS_Sys_SetMotionEdgeLut39(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut39);
HI_VOID VPSS_Sys_SetMotionEdgeLut38(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut38);
HI_VOID VPSS_Sys_SetMotionEdgeLut47(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut47);
HI_VOID VPSS_Sys_SetMotionEdgeLut46(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut46);
HI_VOID VPSS_Sys_SetMotionEdgeLut45(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut45);
HI_VOID VPSS_Sys_SetMotionEdgeLut44(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut44);
HI_VOID VPSS_Sys_SetMotionEdgeLut43(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut43);
HI_VOID VPSS_Sys_SetMotionEdgeLut42(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut42);
HI_VOID VPSS_Sys_SetMotionEdgeLut41(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut41);
HI_VOID VPSS_Sys_SetMotionEdgeLut40(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut40);
HI_VOID VPSS_Sys_SetMotionEdgeLut4f(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut4f);
HI_VOID VPSS_Sys_SetMotionEdgeLut4e(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut4e);
HI_VOID VPSS_Sys_SetMotionEdgeLut4d(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut4d);
HI_VOID VPSS_Sys_SetMotionEdgeLut4c(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut4c);
HI_VOID VPSS_Sys_SetMotionEdgeLut4b(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut4b);
HI_VOID VPSS_Sys_SetMotionEdgeLut4a(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut4a);
HI_VOID VPSS_Sys_SetMotionEdgeLut49(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut49);
HI_VOID VPSS_Sys_SetMotionEdgeLut48(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut48);
HI_VOID VPSS_Sys_SetMotionEdgeLut57(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut57);
HI_VOID VPSS_Sys_SetMotionEdgeLut56(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut56);
HI_VOID VPSS_Sys_SetMotionEdgeLut55(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut55);
HI_VOID VPSS_Sys_SetMotionEdgeLut54(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut54);
HI_VOID VPSS_Sys_SetMotionEdgeLut53(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut53);
HI_VOID VPSS_Sys_SetMotionEdgeLut52(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut52);
HI_VOID VPSS_Sys_SetMotionEdgeLut51(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut51);
HI_VOID VPSS_Sys_SetMotionEdgeLut50(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut50);
HI_VOID VPSS_Sys_SetMotionEdgeLut5f(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut5f);
HI_VOID VPSS_Sys_SetMotionEdgeLut5e(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut5e);
HI_VOID VPSS_Sys_SetMotionEdgeLut5d(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut5d);
HI_VOID VPSS_Sys_SetMotionEdgeLut5c(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut5c);
HI_VOID VPSS_Sys_SetMotionEdgeLut5b(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut5b);
HI_VOID VPSS_Sys_SetMotionEdgeLut5a(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut5a);
HI_VOID VPSS_Sys_SetMotionEdgeLut59(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut59);
HI_VOID VPSS_Sys_SetMotionEdgeLut58(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut58);
HI_VOID VPSS_Sys_SetMotionEdgeLut67(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut67);
HI_VOID VPSS_Sys_SetMotionEdgeLut66(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut66);
HI_VOID VPSS_Sys_SetMotionEdgeLut65(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut65);
HI_VOID VPSS_Sys_SetMotionEdgeLut64(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut64);
HI_VOID VPSS_Sys_SetMotionEdgeLut63(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut63);
HI_VOID VPSS_Sys_SetMotionEdgeLut62(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut62);
HI_VOID VPSS_Sys_SetMotionEdgeLut61(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut61);
HI_VOID VPSS_Sys_SetMotionEdgeLut60(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut60);
HI_VOID VPSS_Sys_SetMotionEdgeLut6f(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut6f);
HI_VOID VPSS_Sys_SetMotionEdgeLut6e(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut6e);
HI_VOID VPSS_Sys_SetMotionEdgeLut6d(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut6d);
HI_VOID VPSS_Sys_SetMotionEdgeLut6c(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut6c);
HI_VOID VPSS_Sys_SetMotionEdgeLut6b(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut6b);
HI_VOID VPSS_Sys_SetMotionEdgeLut6a(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut6a);
HI_VOID VPSS_Sys_SetMotionEdgeLut69(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut69);
HI_VOID VPSS_Sys_SetMotionEdgeLut68(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut68);
HI_VOID VPSS_Sys_SetMotionEdgeLut77(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut77);
HI_VOID VPSS_Sys_SetMotionEdgeLut76(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut76);
HI_VOID VPSS_Sys_SetMotionEdgeLut75(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut75);
HI_VOID VPSS_Sys_SetMotionEdgeLut74(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut74);
HI_VOID VPSS_Sys_SetMotionEdgeLut73(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut73);
HI_VOID VPSS_Sys_SetMotionEdgeLut72(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut72);
HI_VOID VPSS_Sys_SetMotionEdgeLut71(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut71);
HI_VOID VPSS_Sys_SetMotionEdgeLut70(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut70);
HI_VOID VPSS_Sys_SetMotionEdgeLut7f(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut7f);
HI_VOID VPSS_Sys_SetMotionEdgeLut7e(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut7e);
HI_VOID VPSS_Sys_SetMotionEdgeLut7d(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut7d);
HI_VOID VPSS_Sys_SetMotionEdgeLut7c(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut7c);
HI_VOID VPSS_Sys_SetMotionEdgeLut7b(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut7b);
HI_VOID VPSS_Sys_SetMotionEdgeLut7a(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut7a);
HI_VOID VPSS_Sys_SetMotionEdgeLut79(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut79);
HI_VOID VPSS_Sys_SetMotionEdgeLut78(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut78);
HI_VOID VPSS_Sys_SetMotionEdgeLut87(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut87);
HI_VOID VPSS_Sys_SetMotionEdgeLut86(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut86);
HI_VOID VPSS_Sys_SetMotionEdgeLut85(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut85);
HI_VOID VPSS_Sys_SetMotionEdgeLut84(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut84);
HI_VOID VPSS_Sys_SetMotionEdgeLut83(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut83);
HI_VOID VPSS_Sys_SetMotionEdgeLut82(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut82);
HI_VOID VPSS_Sys_SetMotionEdgeLut81(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut81);
HI_VOID VPSS_Sys_SetMotionEdgeLut80(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut80);
HI_VOID VPSS_Sys_SetMotionEdgeLut8f(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut8f);
HI_VOID VPSS_Sys_SetMotionEdgeLut8e(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut8e);
HI_VOID VPSS_Sys_SetMotionEdgeLut8d(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut8d);
HI_VOID VPSS_Sys_SetMotionEdgeLut8c(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut8c);
HI_VOID VPSS_Sys_SetMotionEdgeLut8b(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut8b);
HI_VOID VPSS_Sys_SetMotionEdgeLut8a(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut8a);
HI_VOID VPSS_Sys_SetMotionEdgeLut89(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut89);
HI_VOID VPSS_Sys_SetMotionEdgeLut88(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut88);
HI_VOID VPSS_Sys_SetMotionEdgeLut97(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut97);
HI_VOID VPSS_Sys_SetMotionEdgeLut96(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut96);
HI_VOID VPSS_Sys_SetMotionEdgeLut95(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut95);
HI_VOID VPSS_Sys_SetMotionEdgeLut94(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut94);
HI_VOID VPSS_Sys_SetMotionEdgeLut93(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut93);
HI_VOID VPSS_Sys_SetMotionEdgeLut92(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut92);
HI_VOID VPSS_Sys_SetMotionEdgeLut91(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut91);
HI_VOID VPSS_Sys_SetMotionEdgeLut90(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut90);
HI_VOID VPSS_Sys_SetMotionEdgeLut9f(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut9f);
HI_VOID VPSS_Sys_SetMotionEdgeLut9e(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut9e);
HI_VOID VPSS_Sys_SetMotionEdgeLut9d(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut9d);
HI_VOID VPSS_Sys_SetMotionEdgeLut9c(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut9c);
HI_VOID VPSS_Sys_SetMotionEdgeLut9b(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut9b);
HI_VOID VPSS_Sys_SetMotionEdgeLut9a(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut9a);
HI_VOID VPSS_Sys_SetMotionEdgeLut99(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut99);
HI_VOID VPSS_Sys_SetMotionEdgeLut98(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lut98);
HI_VOID VPSS_Sys_SetMotionEdgeLuta7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_luta7);
HI_VOID VPSS_Sys_SetMotionEdgeLuta6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_luta6);
HI_VOID VPSS_Sys_SetMotionEdgeLuta5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_luta5);
HI_VOID VPSS_Sys_SetMotionEdgeLuta4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_luta4);
HI_VOID VPSS_Sys_SetMotionEdgeLuta3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_luta3);
HI_VOID VPSS_Sys_SetMotionEdgeLuta2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_luta2);
HI_VOID VPSS_Sys_SetMotionEdgeLuta1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_luta1);
HI_VOID VPSS_Sys_SetMotionEdgeLuta0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_luta0);
HI_VOID VPSS_Sys_SetMotionEdgeLutaf(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutaf);
HI_VOID VPSS_Sys_SetMotionEdgeLutae(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutae);
HI_VOID VPSS_Sys_SetMotionEdgeLutad(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutad);
HI_VOID VPSS_Sys_SetMotionEdgeLutac(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutac);
HI_VOID VPSS_Sys_SetMotionEdgeLutab(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutab);
HI_VOID VPSS_Sys_SetMotionEdgeLutaa(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutaa);
HI_VOID VPSS_Sys_SetMotionEdgeLuta9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_luta9);
HI_VOID VPSS_Sys_SetMotionEdgeLuta8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_luta8);
HI_VOID VPSS_Sys_SetMotionEdgeLutb7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutb7);
HI_VOID VPSS_Sys_SetMotionEdgeLutb6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutb6);
HI_VOID VPSS_Sys_SetMotionEdgeLutb5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutb5);
HI_VOID VPSS_Sys_SetMotionEdgeLutb4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutb4);
HI_VOID VPSS_Sys_SetMotionEdgeLutb3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutb3);
HI_VOID VPSS_Sys_SetMotionEdgeLutb2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutb2);
HI_VOID VPSS_Sys_SetMotionEdgeLutb1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutb1);
HI_VOID VPSS_Sys_SetMotionEdgeLutb0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutb0);
HI_VOID VPSS_Sys_SetMotionEdgeLutbf(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutbf);
HI_VOID VPSS_Sys_SetMotionEdgeLutbe(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutbe);
HI_VOID VPSS_Sys_SetMotionEdgeLutbd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutbd);
HI_VOID VPSS_Sys_SetMotionEdgeLutbc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutbc);
HI_VOID VPSS_Sys_SetMotionEdgeLutbb(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutbb);
HI_VOID VPSS_Sys_SetMotionEdgeLutba(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutba);
HI_VOID VPSS_Sys_SetMotionEdgeLutb9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutb9);
HI_VOID VPSS_Sys_SetMotionEdgeLutb8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutb8);
HI_VOID VPSS_Sys_SetMotionEdgeLutc7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutc7);
HI_VOID VPSS_Sys_SetMotionEdgeLutc6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutc6);
HI_VOID VPSS_Sys_SetMotionEdgeLutc5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutc5);
HI_VOID VPSS_Sys_SetMotionEdgeLutc4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutc4);
HI_VOID VPSS_Sys_SetMotionEdgeLutc3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutc3);
HI_VOID VPSS_Sys_SetMotionEdgeLutc2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutc2);
HI_VOID VPSS_Sys_SetMotionEdgeLutc1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutc1);
HI_VOID VPSS_Sys_SetMotionEdgeLutc0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutc0);
HI_VOID VPSS_Sys_SetMotionEdgeLutcf(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutcf);
HI_VOID VPSS_Sys_SetMotionEdgeLutce(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutce);
HI_VOID VPSS_Sys_SetMotionEdgeLutcd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutcd);
HI_VOID VPSS_Sys_SetMotionEdgeLutcc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutcc);
HI_VOID VPSS_Sys_SetMotionEdgeLutcb(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutcb);
HI_VOID VPSS_Sys_SetMotionEdgeLutca(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutca);
HI_VOID VPSS_Sys_SetMotionEdgeLutc9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutc9);
HI_VOID VPSS_Sys_SetMotionEdgeLutc8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutc8);
HI_VOID VPSS_Sys_SetMotionEdgeLutd7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutd7);
HI_VOID VPSS_Sys_SetMotionEdgeLutd6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutd6);
HI_VOID VPSS_Sys_SetMotionEdgeLutd5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutd5);
HI_VOID VPSS_Sys_SetMotionEdgeLutd4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutd4);
HI_VOID VPSS_Sys_SetMotionEdgeLutd3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutd3);
HI_VOID VPSS_Sys_SetMotionEdgeLutd2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutd2);
HI_VOID VPSS_Sys_SetMotionEdgeLutd1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutd1);
HI_VOID VPSS_Sys_SetMotionEdgeLutd0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutd0);
HI_VOID VPSS_Sys_SetMotionEdgeLutdf(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutdf);
HI_VOID VPSS_Sys_SetMotionEdgeLutde(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutde);
HI_VOID VPSS_Sys_SetMotionEdgeLutdd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutdd);
HI_VOID VPSS_Sys_SetMotionEdgeLutdc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutdc);
HI_VOID VPSS_Sys_SetMotionEdgeLutdb(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutdb);
HI_VOID VPSS_Sys_SetMotionEdgeLutda(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutda);
HI_VOID VPSS_Sys_SetMotionEdgeLutd9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutd9);
HI_VOID VPSS_Sys_SetMotionEdgeLutd8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutd8);
HI_VOID VPSS_Sys_SetMotionEdgeLute7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lute7);
HI_VOID VPSS_Sys_SetMotionEdgeLute6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lute6);
HI_VOID VPSS_Sys_SetMotionEdgeLute5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lute5);
HI_VOID VPSS_Sys_SetMotionEdgeLute4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lute4);
HI_VOID VPSS_Sys_SetMotionEdgeLute3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lute3);
HI_VOID VPSS_Sys_SetMotionEdgeLute2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lute2);
HI_VOID VPSS_Sys_SetMotionEdgeLute1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lute1);
HI_VOID VPSS_Sys_SetMotionEdgeLute0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lute0);
HI_VOID VPSS_Sys_SetMotionEdgeLutef(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutef);
HI_VOID VPSS_Sys_SetMotionEdgeLutee(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutee);
HI_VOID VPSS_Sys_SetMotionEdgeLuted(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_luted);
HI_VOID VPSS_Sys_SetMotionEdgeLutec(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutec);
HI_VOID VPSS_Sys_SetMotionEdgeLuteb(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_luteb);
HI_VOID VPSS_Sys_SetMotionEdgeLutea(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutea);
HI_VOID VPSS_Sys_SetMotionEdgeLute9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lute9);
HI_VOID VPSS_Sys_SetMotionEdgeLute8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lute8);
HI_VOID VPSS_Sys_SetMotionEdgeLutf7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutf7);
HI_VOID VPSS_Sys_SetMotionEdgeLutf6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutf6);
HI_VOID VPSS_Sys_SetMotionEdgeLutf5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutf5);
HI_VOID VPSS_Sys_SetMotionEdgeLutf4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutf4);
HI_VOID VPSS_Sys_SetMotionEdgeLutf3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutf3);
HI_VOID VPSS_Sys_SetMotionEdgeLutf2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutf2);
HI_VOID VPSS_Sys_SetMotionEdgeLutf1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutf1);
HI_VOID VPSS_Sys_SetMotionEdgeLutf0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutf0);
HI_VOID VPSS_Sys_SetMotionEdgeLutff(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutff);
HI_VOID VPSS_Sys_SetMotionEdgeLutfe(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutfe);
HI_VOID VPSS_Sys_SetMotionEdgeLutfd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutfd);
HI_VOID VPSS_Sys_SetMotionEdgeLutfc(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutfc);
HI_VOID VPSS_Sys_SetMotionEdgeLutfb(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutfb);
HI_VOID VPSS_Sys_SetMotionEdgeLutfa(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutfa);
HI_VOID VPSS_Sys_SetMotionEdgeLutf9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutf9);
HI_VOID VPSS_Sys_SetMotionEdgeLutf8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motion_edge_lutf8);
HI_VOID VPSS_Sys_SetMarketcoor(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 marketcoor);
HI_VOID VPSS_Sys_SetMarketmode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 marketmode);
HI_VOID VPSS_Sys_SetMarketmodeen(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 marketmodeen);
HI_VOID VPSS_Sys_SetCnren(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cnren);
HI_VOID VPSS_Sys_SetYnren(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ynren);
HI_VOID VPSS_Sys_SetNren(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 nren);
HI_VOID VPSS_Sys_SetAlpha2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 alpha2);
HI_VOID VPSS_Sys_SetAlpha1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 alpha1);
HI_VOID VPSS_Sys_SetCmotionlpfmode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cmotionlpfmode);
HI_VOID VPSS_Sys_SetYmotionlpfmode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ymotionlpfmode);
HI_VOID VPSS_Sys_SetCmotioncalcmode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cmotioncalcmode);
HI_VOID VPSS_Sys_SetYmotioncalcmode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ymotioncalcmode);
HI_VOID VPSS_Sys_SetMeancadjshift(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 meancadjshift);
HI_VOID VPSS_Sys_SetMeanyadjshift(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 meanyadjshift);
HI_VOID VPSS_Sys_SetMeanCmotionAdjEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_cmotion_adj_en);
HI_VOID VPSS_Sys_SetMeanYmotionAdjEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_ymotion_adj_en);
HI_VOID VPSS_Sys_SetMdprelpfen(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mdprelpfen);
HI_VOID VPSS_Sys_SetCmdcore(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cmdcore);
HI_VOID VPSS_Sys_SetCmdgain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cmdgain);
HI_VOID VPSS_Sys_SetYmdcore(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ymdcore);
HI_VOID VPSS_Sys_SetYmdgain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ymdgain);
HI_VOID VPSS_Sys_SetRandomctrlmode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 randomctrlmode);
HI_VOID VPSS_Sys_SetBlkdiffthd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 blkdiffthd);
HI_VOID VPSS_Sys_SetNoisedetecten(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 noisedetecten);
HI_VOID VPSS_Sys_SetFlatthdmax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 flatthdmax);
HI_VOID VPSS_Sys_SetFlatthdmed(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 flatthdmed);
HI_VOID VPSS_Sys_SetFlatthdmin(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 flatthdmin);
HI_VOID VPSS_Sys_SetSmvythd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 smvythd);
HI_VOID VPSS_Sys_SetSmvxthd(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 smvxthd);
HI_VOID VPSS_Sys_SetDiscardsmvyen(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 discardsmvyen);
HI_VOID VPSS_Sys_SetDiscardsmvxen(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 discardsmvxen);
HI_VOID VPSS_Sys_SetGmAdj(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 gm_adj);
HI_VOID VPSS_Sys_SetMvlpfmode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mvlpfmode);
HI_VOID VPSS_Sys_SetMvrefmode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mvrefmode);
HI_VOID VPSS_Sys_SetMotionestimateen(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motionestimateen);
HI_VOID VPSS_Sys_SetMagPnlCoreXmv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mag_pnl_core_xmv);
HI_VOID VPSS_Sys_SetMagPnlGainXmv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mag_pnl_gain_xmv);
HI_VOID VPSS_Sys_SetMagPnlCore0mv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mag_pnl_core_0mv);
HI_VOID VPSS_Sys_SetMagPnlGain0mv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mag_pnl_gain_0mv);
HI_VOID VPSS_Sys_SetStdPnlCoreXmv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 std_pnl_core_xmv);
HI_VOID VPSS_Sys_SetStdPnlGainXmv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 std_pnl_gain_xmv);
HI_VOID VPSS_Sys_SetStdPnlCore0mv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 std_pnl_core_0mv);
HI_VOID VPSS_Sys_SetStdPnlGain0mv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 std_pnl_gain_0mv);
HI_VOID VPSS_Sys_SetStdCoreXmv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 std_core_xmv);
HI_VOID VPSS_Sys_SetStdCore0mv(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 std_core_0mv);
HI_VOID VPSS_Sys_SetStdPnlCore(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 std_pnl_core);
HI_VOID VPSS_Sys_SetStdPnlGain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 std_pnl_gain);
HI_VOID VPSS_Sys_SetAdjXmvMax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 adj_xmv_max);
HI_VOID VPSS_Sys_SetAdj0mvMax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 adj_0mv_max);
HI_VOID VPSS_Sys_SetAdjXmvMin(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 adj_xmv_min);
HI_VOID VPSS_Sys_SetAdj0mvMin(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 adj_0mv_min);
HI_VOID VPSS_Sys_SetAdjMvMin(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 adj_mv_min);
HI_VOID VPSS_Sys_SetAdjMvMax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 adj_mv_max);
HI_VOID VPSS_Sys_SetCbcrweight2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cbcrweight2);
HI_VOID VPSS_Sys_SetCbcrweight1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cbcrweight1);
HI_VOID VPSS_Sys_SetCbcrupdateen(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cbcrupdateen);
HI_VOID VPSS_Sys_SetCrend1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 crend1);
HI_VOID VPSS_Sys_SetCbend1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cbend1);
HI_VOID VPSS_Sys_SetCrbegin1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 crbegin1);
HI_VOID VPSS_Sys_SetCbbegin1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cbbegin1);
HI_VOID VPSS_Sys_SetCrend2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 crend2);
HI_VOID VPSS_Sys_SetCbend2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cbend2);
HI_VOID VPSS_Sys_SetCrbegin2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 crbegin2);
HI_VOID VPSS_Sys_SetCbbegin2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cbbegin2);
HI_VOID VPSS_Sys_SetMotionmergeratio(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motionmergeratio);
HI_VOID VPSS_Sys_SetPremotionalpha(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 premotionalpha);
HI_VOID VPSS_Sys_SetPremotionmergemode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 premotionmergemode);
HI_VOID VPSS_Sys_SetCmotioncore(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cmotioncore);
HI_VOID VPSS_Sys_SetCmotiongain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cmotiongain);
HI_VOID VPSS_Sys_SetYmotioncore(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ymotioncore);
HI_VOID VPSS_Sys_SetYmotiongain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ymotiongain);
HI_VOID VPSS_Sys_SetMotionmappingen(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 motionmappingen);
HI_VOID VPSS_Sys_SetSaltuslevel(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 saltuslevel);
HI_VOID VPSS_Sys_SetSaltusdecten(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 saltusdecten);
HI_VOID VPSS_Sys_SetCmclpfmode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cmclpfmode);
HI_VOID VPSS_Sys_SetYmclpfmode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ymclpfmode);
HI_VOID VPSS_Sys_SetCmcadjen(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cmcadjen);
HI_VOID VPSS_Sys_SetYmcadjen(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ymcadjen);
HI_VOID VPSS_Sys_SetCnonrrange(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cnonrrange);
HI_VOID VPSS_Sys_SetYnonrrange(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ynonrrange);
HI_VOID VPSS_Sys_SetCmotionmode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cmotionmode);
HI_VOID VPSS_Sys_SetYmotionmode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 ymotionmode);
HI_VOID VPSS_Sys_SetScenechangeinfo(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 scenechangeinfo);
HI_VOID VPSS_Sys_SetScenechangeen(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 scenechangeen);
HI_VOID VPSS_Sys_SetCfgCmdcore(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cfg_cmdcore);
HI_VOID VPSS_Sys_SetCfgCmdgain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cfg_cmdgain);
HI_VOID VPSS_Sys_SetCfgYmdcore(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cfg_ymdcore);
HI_VOID VPSS_Sys_SetCfgYmdgain(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cfg_ymdgain);
HI_VOID VPSS_Sys_SetFlatinfoymax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 flatinfoymax);
HI_VOID VPSS_Sys_SetFlatinfoxmax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 flatinfoxmax);
HI_VOID VPSS_Sys_SetFlatinfoymin(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 flatinfoymin);
HI_VOID VPSS_Sys_SetFlatinfoxmin(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 flatinfoxmin);
HI_VOID VPSS_Sys_SetYblendingymax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingymax);
HI_VOID VPSS_Sys_SetYblendingxmax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingxmax);
HI_VOID VPSS_Sys_SetYblendingymin(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingymin);
HI_VOID VPSS_Sys_SetYblendingxmin(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingxmin);
HI_VOID VPSS_Sys_SetCblendingymax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingymax);
HI_VOID VPSS_Sys_SetCblendingxmax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingxmax);
HI_VOID VPSS_Sys_SetCblendingymin(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingymin);
HI_VOID VPSS_Sys_SetCblendingxmin(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingxmin);
HI_VOID VPSS_Sys_SetDtblendingymax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dtblendingymax);
HI_VOID VPSS_Sys_SetDtblendingxmax(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dtblendingxmax);
HI_VOID VPSS_Sys_SetDtblendingymin(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dtblendingymin);
HI_VOID VPSS_Sys_SetDtblendingxmin(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 dtblendingxmin);
HI_VOID VPSS_Sys_SetMeanMotionRatio3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio3);
HI_VOID VPSS_Sys_SetMeanMotionRatio2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio2);
HI_VOID VPSS_Sys_SetMeanMotionRatio1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio1);
HI_VOID VPSS_Sys_SetMeanMotionRatio0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio0);
HI_VOID VPSS_Sys_SetMeanMotionRatio7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio7);
HI_VOID VPSS_Sys_SetMeanMotionRatio6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio6);
HI_VOID VPSS_Sys_SetMeanMotionRatio5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio5);
HI_VOID VPSS_Sys_SetMeanMotionRatio4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio4);
HI_VOID VPSS_Sys_SetMeanMotionRatio11(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio11);
HI_VOID VPSS_Sys_SetMeanMotionRatio10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio10);
HI_VOID VPSS_Sys_SetMeanMotionRatio9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio9);
HI_VOID VPSS_Sys_SetMeanMotionRatio8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio8);
HI_VOID VPSS_Sys_SetMeanMotionRatio15(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio15);
HI_VOID VPSS_Sys_SetMeanMotionRatio14(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio14);
HI_VOID VPSS_Sys_SetMeanMotionRatio13(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio13);
HI_VOID VPSS_Sys_SetMeanMotionRatio12(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 mean_motion_ratio12);
HI_VOID VPSS_Sys_SetYblendingalphalut3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut3);
HI_VOID VPSS_Sys_SetYblendingalphalut2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut2);
HI_VOID VPSS_Sys_SetYblendingalphalut1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut1);
HI_VOID VPSS_Sys_SetYblendingalphalut0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut0);
HI_VOID VPSS_Sys_SetYblendingalphalut7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut7);
HI_VOID VPSS_Sys_SetYblendingalphalut6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut6);
HI_VOID VPSS_Sys_SetYblendingalphalut5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut5);
HI_VOID VPSS_Sys_SetYblendingalphalut4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut4);
HI_VOID VPSS_Sys_SetYblendingalphalut11(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut11);
HI_VOID VPSS_Sys_SetYblendingalphalut10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut10);
HI_VOID VPSS_Sys_SetYblendingalphalut9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut9);
HI_VOID VPSS_Sys_SetYblendingalphalut8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut8);
HI_VOID VPSS_Sys_SetYblendingalphalut15(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut15);
HI_VOID VPSS_Sys_SetYblendingalphalut14(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut14);
HI_VOID VPSS_Sys_SetYblendingalphalut13(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut13);
HI_VOID VPSS_Sys_SetYblendingalphalut12(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut12);
HI_VOID VPSS_Sys_SetYblendingalphalut19(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut19);
HI_VOID VPSS_Sys_SetYblendingalphalut18(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut18);
HI_VOID VPSS_Sys_SetYblendingalphalut17(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut17);
HI_VOID VPSS_Sys_SetYblendingalphalut16(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut16);
HI_VOID VPSS_Sys_SetYblendingalphalut23(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut23);
HI_VOID VPSS_Sys_SetYblendingalphalut22(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut22);
HI_VOID VPSS_Sys_SetYblendingalphalut21(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut21);
HI_VOID VPSS_Sys_SetYblendingalphalut20(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut20);
HI_VOID VPSS_Sys_SetYblendingalphalut27(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut27);
HI_VOID VPSS_Sys_SetYblendingalphalut26(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut26);
HI_VOID VPSS_Sys_SetYblendingalphalut25(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut25);
HI_VOID VPSS_Sys_SetYblendingalphalut24(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut24);
HI_VOID VPSS_Sys_SetYblendingalphalut31(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut31);
HI_VOID VPSS_Sys_SetYblendingalphalut30(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut30);
HI_VOID VPSS_Sys_SetYblendingalphalut29(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut29);
HI_VOID VPSS_Sys_SetYblendingalphalut28(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 yblendingalphalut28);
HI_VOID VPSS_Sys_SetCblendingalphalut3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut3);
HI_VOID VPSS_Sys_SetCblendingalphalut2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut2);
HI_VOID VPSS_Sys_SetCblendingalphalut1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut1);
HI_VOID VPSS_Sys_SetCblendingalphalut0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut0);
HI_VOID VPSS_Sys_SetCblendingalphalut7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut7);
HI_VOID VPSS_Sys_SetCblendingalphalut6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut6);
HI_VOID VPSS_Sys_SetCblendingalphalut5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut5);
HI_VOID VPSS_Sys_SetCblendingalphalut4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut4);
HI_VOID VPSS_Sys_SetCblendingalphalut11(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut11);
HI_VOID VPSS_Sys_SetCblendingalphalut10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut10);
HI_VOID VPSS_Sys_SetCblendingalphalut9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut9);
HI_VOID VPSS_Sys_SetCblendingalphalut8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut8);
HI_VOID VPSS_Sys_SetCblendingalphalut15(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut15);
HI_VOID VPSS_Sys_SetCblendingalphalut14(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut14);
HI_VOID VPSS_Sys_SetCblendingalphalut13(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut13);
HI_VOID VPSS_Sys_SetCblendingalphalut12(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut12);
HI_VOID VPSS_Sys_SetCblendingalphalut19(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut19);
HI_VOID VPSS_Sys_SetCblendingalphalut18(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut18);
HI_VOID VPSS_Sys_SetCblendingalphalut17(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut17);
HI_VOID VPSS_Sys_SetCblendingalphalut16(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut16);
HI_VOID VPSS_Sys_SetCblendingalphalut23(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut23);
HI_VOID VPSS_Sys_SetCblendingalphalut22(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut22);
HI_VOID VPSS_Sys_SetCblendingalphalut21(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut21);
HI_VOID VPSS_Sys_SetCblendingalphalut20(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut20);
HI_VOID VPSS_Sys_SetCblendingalphalut27(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut27);
HI_VOID VPSS_Sys_SetCblendingalphalut26(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut26);
HI_VOID VPSS_Sys_SetCblendingalphalut25(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut25);
HI_VOID VPSS_Sys_SetCblendingalphalut24(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut24);
HI_VOID VPSS_Sys_SetCblendingalphalut31(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut31);
HI_VOID VPSS_Sys_SetCblendingalphalut30(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut30);
HI_VOID VPSS_Sys_SetCblendingalphalut29(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut29);
HI_VOID VPSS_Sys_SetCblendingalphalut28(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cblendingalphalut28);
HI_VOID VPSS_Sys_SetDebug0(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug0);
HI_VOID VPSS_Sys_SetDebug1(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug1);
HI_VOID VPSS_Sys_SetDebug2(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug2);
HI_VOID VPSS_Sys_SetDebug3(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug3);
HI_VOID VPSS_Sys_SetDebug4(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug4);
HI_VOID VPSS_Sys_SetDebug5(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug5);
HI_VOID VPSS_Sys_SetDebug6(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug6);
HI_VOID VPSS_Sys_SetDebug7(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug7);
HI_VOID VPSS_Sys_SetDebug8(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug8);
HI_VOID VPSS_Sys_SetDebug9(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug9);
HI_VOID VPSS_Sys_SetDebug10(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug10);
HI_VOID VPSS_Sys_SetDebug11(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug11);
HI_VOID VPSS_Sys_SetDebug12(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug12);
HI_VOID VPSS_Sys_SetDebug13(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug13);
HI_VOID VPSS_Sys_SetDebug14(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug14);
HI_VOID VPSS_Sys_SetDebug15(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug15);
HI_VOID VPSS_Sys_SetDebug16(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug16);
HI_VOID VPSS_Sys_SetDebug17(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug17);
HI_VOID VPSS_Sys_SetDebug18(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug18);
HI_VOID VPSS_Sys_SetDebug19(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug19);
HI_VOID VPSS_Sys_SetDebug20(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug20);
HI_VOID VPSS_Sys_SetDebug21(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug21);
HI_VOID VPSS_Sys_SetDebug22(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug22);
HI_VOID VPSS_Sys_SetDebug23(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug23);
HI_VOID VPSS_Sys_SetDebug24(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug24);
HI_VOID VPSS_Sys_SetDebug25(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug25);
HI_VOID VPSS_Sys_SetDebug26(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug26);
HI_VOID VPSS_Sys_SetDebug27(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug27);
HI_VOID VPSS_Sys_SetDebug28(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug28);
HI_VOID VPSS_Sys_SetDebug29(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug29);
HI_VOID VPSS_Sys_SetDebug30(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug30);
HI_VOID VPSS_Sys_SetDebug31(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug31);
HI_VOID VPSS_Sys_SetDebug32(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug32);
HI_VOID VPSS_Sys_SetDebug33(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug33);
HI_VOID VPSS_Sys_SetDebug34(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug34);
HI_VOID VPSS_Sys_SetDebug35(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug35);
HI_VOID VPSS_Sys_SetDebug36(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug36);
HI_VOID VPSS_Sys_SetDebug37(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug37);
HI_VOID VPSS_Sys_SetDebug38(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug38);
HI_VOID VPSS_Sys_SetDebug39(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug39);
HI_VOID VPSS_Sys_SetDebug40(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug40);
HI_VOID VPSS_Sys_SetDebug41(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug41);
HI_VOID VPSS_Sys_SetDebug42(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug42);
HI_VOID VPSS_Sys_SetDebug43(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 debug43);
HI_VOID VPSS_Sys_SetCfEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_en);
HI_VOID VPSS_Sys_SetCfMuteEn(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_mute_en);
HI_VOID VPSS_Sys_SetCfDBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_d_bypass);
HI_VOID VPSS_Sys_SetCfHBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_h_bypass);
HI_VOID VPSS_Sys_SetCf2bBypass(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_2b_bypass);
HI_VOID VPSS_Sys_SetCfLmRmode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_lm_rmode);
HI_VOID VPSS_Sys_SetCfUvInvert(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_uv_invert);
HI_VOID VPSS_Sys_SetCfDcmpMode(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_dcmp_mode);
HI_VOID VPSS_Sys_SetCfBitw(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_bitw);
HI_VOID VPSS_Sys_SetCfOrder(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_order);
HI_VOID VPSS_Sys_SetCfType(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_type);
HI_VOID VPSS_Sys_SetCfFormat(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_format);
HI_VOID VPSS_Sys_SetCfHeight(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_height);
HI_VOID VPSS_Sys_SetCfWidth(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_width);
HI_VOID VPSS_Sys_SetCfVerOffset(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_ver_offset);
HI_VOID VPSS_Sys_SetCfHorOffset(S_VPSS_REGS_TYPE *pstVpssRegs, HI_U32 u32AddrOffset, HI_U32 cf_hor_offset);

#endif
